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公开(公告)号:US08895368B2
公开(公告)日:2014-11-25
申请号:US14133593
申请日:2013-12-18
Applicant: ChipMOS Technologies Inc.
Inventor: Chien-Hao Wang
CPC classification number: H01L24/05 , H01L21/568 , H01L24/03 , H01L24/13 , H01L24/19 , H01L24/96 , H01L2224/03003 , H01L2224/03334 , H01L2224/0345 , H01L2224/0346 , H01L2224/0401 , H01L2224/04105 , H01L2224/05005 , H01L2224/05008 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/131 , H01L2924/00014 , H01L2224/13 , H01L2924/014
Abstract: A method for manufacturing a chip package structure includes following steps. A carrier having a metal layer is provided. A patterned photoresist layer is formed on the metal layer. The patterned photoresist layer has a plurality of first openings exposing a portion of the metal layer. Connection terminals are formed in the first openings, respectively, and the connection terminals are connected to the metal layer. A chip is placed on the carrier, and first pads of the chip are respectively connected to the connection terminals through a plurality of connection conductors. After the chip is placed on the carrier, the patterned photoresist layer is removed. A encapsulant is formed on the carrier. The encapsulant encapsulates the chip, the connection conductors, and the metal layer. The carrier and the metal layer are removed to expose the connection terminals.
Abstract translation: 制造芯片封装结构的方法包括以下步骤。 提供具有金属层的载体。 在金属层上形成图案化的光致抗蚀剂层。 图案化的光致抗蚀剂层具有暴露金属层的一部分的多个第一开口。 连接端子分别形成在第一开口中,并且连接端子连接到金属层。 将芯片放置在载体上,并且芯片的第一焊盘通过多个连接导体分别连接到连接端子。 将芯片放置在载体上之后,去除图案化的光致抗蚀剂层。 在载体上形成密封剂。 密封剂封装芯片,连接导体和金属层。 移除载体和金属层以露出连接端子。
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公开(公告)号:US20140322869A1
公开(公告)日:2014-10-30
申请号:US14133593
申请日:2013-12-18
Applicant: ChipMOS Technologies Inc.
Inventor: Chien-Hao Wang
CPC classification number: H01L24/05 , H01L21/568 , H01L24/03 , H01L24/13 , H01L24/19 , H01L24/96 , H01L2224/03003 , H01L2224/03334 , H01L2224/0345 , H01L2224/0346 , H01L2224/0401 , H01L2224/04105 , H01L2224/05005 , H01L2224/05008 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/131 , H01L2924/00014 , H01L2224/13 , H01L2924/014
Abstract: A method for manufacturing a chip package structure includes following steps. A carrier having a metal layer is provided. A patterned photoresist layer is formed on the metal layer. The patterned photoresist layer has a plurality of first openings exposing a portion of the metal layer. Connection terminals are formed in the first openings, respectively, and the connection terminals are connected to the metal layer. A chip is placed on the carrier, and first pads of the chip are respectively connected to the connection terminals through a plurality of connection conductors. After the chip is placed on the carrier, the patterned photoresist layer is removed. A encapsulant is formed on the carrier. The encapsulant encapsulates the chip, the connection conductors, and the metal layer. The carrier and the metal layer are removed to expose the connection terminals.
Abstract translation: 制造芯片封装结构的方法包括以下步骤。 提供具有金属层的载体。 在金属层上形成图案化的光致抗蚀剂层。 图案化的光致抗蚀剂层具有暴露金属层的一部分的多个第一开口。 连接端子分别形成在第一开口中,并且连接端子连接到金属层。 将芯片放置在载体上,并且芯片的第一焊盘通过多个连接导体分别连接到连接端子。 将芯片放置在载体上之后,去除图案化的光致抗蚀剂层。 在载体上形成密封剂。 密封剂封装芯片,连接导体和金属层。 移除载体和金属层以露出连接端子。
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