公开(公告)号：US20090128471A1

公开(公告)日：2009-05-21

申请号：US12153912

申请日：2008-05-28

申请人： Chien-Chung Hsiao ,  Wei-Jen Chou ,  Bor-Jyh Pan

发明人： Chien-Chung Hsiao ,  Wei-Jen Chou ,  Bor-Jyh Pan

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G3/3406 ,  G09G2300/0426 ,  G09G2360/145

摘要： A liquid crystal display module and an integrated driving board thereof are disclosed. The driving board includes a substrate, a circuit pattern, a timing clock driver, a light emitting diode (LED) driving module, a color management module and a photosensitive chip. The circuit pattern is disposed on the surface of the substrate. The timing clock driver, the LED driving module, the color management module and the photosensitive chip are disposed on the substrate and electrically coupled to the circuit pattern. The LED driving module is electrically coupled to the timing clock driver. The color management module is electrically coupled to the LED driving module. The photosensitive chip is electrically coupled to the color management module.

摘要翻译： 公开了一种液晶显示模块及其集成驱动板。 驱动板包括基板，电路图案，定时时钟驱动器，发光二极管（LED）驱动模块，颜色管理模块和感光芯片。 电路图案设置在基板的表面上。 定时时钟驱动器，LED驱动模块，颜色管理模块和感光芯片设置在基板上并电耦合到电路图案。 LED驱动模块电连接到定时时钟驱动器。 颜色管理模块电耦合到LED驱动模块。 感光芯片电耦合到颜色管理模块。

公开(公告)号：US20090096739A1

公开(公告)日：2009-04-16

申请号：US12053281

申请日：2008-03-21

申请人： Yu-Chin Lan ,  Hui - Chi Chang ,  Chien-Chung Hsiao

发明人： Yu-Chin Lan ,  Hui - Chi Chang ,  Chien-Chung Hsiao

IPC分类号： G09G3/36

CPC分类号： G09G3/342 ,  G09G2320/0233 ,  G09G2320/0633 ,  G09G2330/02 ,  H05B33/0827

摘要： A light source driving circuit for a backlight module is disclosed, wherein each driving unit includes a reference resistor, a transistor, a bias resistor and a shunt regulator. The transistor is coupled between an LED string and the reference resistor, and the bias resistor is coupled between an operation voltage and the control terminal of the transistor. The shunt regulator is coupled between the control terminal of the transistor and a common terminal, and the reference pin of the shunt regulator is coupled to the common node between the reference resistor and the transistor.

摘要翻译： 公开了一种用于背光模块的光源驱动电路，其中每个驱动单元包括参考电阻器，晶体管，偏置电阻器和分流调节器。 晶体管耦合在LED串和参考电阻之间，偏置电阻耦合在工作电压和晶体管的控制端之间。 并联调节器耦合在晶体管的控制端和公共端之间，并联调节器的参考引脚耦合到参考电阻和晶体管之间的公共节点。

公开(公告)号：US08308317B2

公开(公告)日：2012-11-13

申请号：US12071958

申请日：2008-02-28

申请人： Wei-Jen Chou ,  Chien-Chung Hsiao ,  Bor-Jyh Pan ,  Chiao-Chih Yang

发明人： Wei-Jen Chou ,  Chien-Chung Hsiao ,  Bor-Jyh Pan ,  Chiao-Chih Yang

IPC分类号： G09F13/04 ,  G09F13/08 ,  F21V9/00 ,  H05B37/00 ,  H05B39/00 ,  H05B41/00

CPC分类号： G02F1/133603 ,  G02F2001/133613 ,  G09G3/3413 ,  G09G2330/02 ,  G09G2360/145

摘要： A surface light source structure having a circuit board, a first light emitting diode (LED) array, and a second LED array is provided. The first and second LED arrays are assembled on the circuit board. Each LED rows of the two LED arrays has a plurality of LED units connected in series. The LED rows of the first LED array are connected in parallel. The LED rows of the second LED array are connected in parallel. The LED rows of the second LED array are intersected between the LED rows of the first LED array. Positive-to-negative directions of the LED units of the first and second LED array are arranged in opposite directions.

摘要翻译： 提供具有电路板，第一发光二极管（LED）阵列和第二LED阵列的表面光源结构。 第一和第二LED阵列组装在电路板上。 两个LED阵列的每个LED行具有串联连接的多个LED单元。 第一LED阵列的LED行并联连接。 第二LED阵列的LED行并联连接。 第二LED阵列的LED行在第一LED阵列的LED行之间相交。 第一和第二LED阵列的LED单元的正向负方向被布置在相反的方向。

公开(公告)号：US06448967B1

公开(公告)日：2002-09-10

申请号：US09360597

申请日：1999-07-26

申请人： Chien-Chung Hsiao

发明人： Chien-Chung Hsiao

IPC分类号： G06T1540

CPC分类号： G06T15/405

摘要： Memory bandwidth is the bottleneck in a three-dimensional display system. A method with Z-Buffer pre-test reduces the memory accesses in the three-dimensional graphics system. This method includes two depth(Z) caches, a control logic for controlling memory access and two Z(depth) cache mechanisms. If the incoming pixel with Z-Buffer pre-test fails, then the pixel is discarded. Thus, the following texture mapping and other tests for the pixel are eliminated and memory accesses are reduced.

摘要翻译： 内存带宽是三维显示系统的瓶颈。 一种使用Z-Buffer预测试的方法可以减少三维图形系统中的存储器访问。 该方法包括两个深度（Z）缓存，用于控制存储器访问的控制逻辑和两个Z（深度）高速缓存机制。 如果带有Z-Buffer预测试的输入像素失败，则丢弃像素。 因此，消除了像素的以下纹理映射和其他测试，并且减少了存储器访问。

公开(公告)号：US06271851B1

公开(公告)日：2001-08-07

申请号：US09596981

申请日：2000-06-20

申请人： Chien-Chung Hsiao ,  Tsung-Feng Lee

发明人： Chien-Chung Hsiao ,  Tsung-Feng Lee

IPC分类号： G06T1540

CPC分类号： G06T15/405

摘要： The present invention discloses a method and system, which discards invalid pixels by using cache memories storing depth values of all pixels having inputted which satisfy a Z Test Mode. The present invention is applied in a three-dimensional graphic system, and uses a plurality of pre-test units to process input pixels in a parallel manner to avoid system performance degeneration due to sequential execution used in prior art. The plurality of pre-test units read the depth values stored in a pre-test Z cache in the system and compare them with the depth values of input pixels being processed according to the Z Test Mode. If the answer is yes, the input pixels are discarded. Otherwise, the content of the pre-test Z cache is updated.

摘要翻译： 本发明公开了一种方法和系统，其通过使用存储满足Z测试模式的输入的所有像素的深度值的高速缓冲存储器来丢弃无效像素。 本发明应用在三维图形系统中，并且使用多个预测单元以并行方式处理输入像素，以避免由于现有技术中使用的顺序执行而导致的系统性能退化。 多个预测单元读取存储在系统中的预测Z高速缓存中的深度值，并将其与根据Z测试模式正在处理的输入像素的深度值进行比较。 如果答案为是，输入像素将被丢弃。 否则，将更新预测试Z缓存的内容。

公开(公告)号：US08207682B2

公开(公告)日：2012-06-26

申请号：US12544030

申请日：2009-08-19

申请人： Yu-Chin Lan ,  Wei-Jen Chou ,  Shih-Yuan Yu ,  Chien-Chung Hsiao

发明人： Yu-Chin Lan ,  Wei-Jen Chou ,  Shih-Yuan Yu ,  Chien-Chung Hsiao

IPC分类号： H05B37/02

CPC分类号： H05B33/0863

摘要： A light source control method and a light source control device are used for controlling a light source. The light source control device includes a position detecting sensor and a microcontroller. The light source control method includes steps of generating a first signal according to an object touching a position of the position detecting sensor, and generating a control signal according to a light source adjustable parameter set corresponding to the first signal for controlling an illuminating status of the light source. The light source adjustable parameter set includes a plurality of color value components. The control signal is generated by the microcontroller according to the color value components.

摘要翻译： 光源控制方法和光源控制装置用于控制光源。 光源控制装置包括位置检测传感器和微控制器。 光源控制方法包括以下步骤：根据触摸位置检测传感器的位置的物体产生第一信号，并根据与第一信号相对应的光源可调参数集产生控制信号，以控制第一信号的照明状态 光源。 光源可调参数组包括多个颜色值分量。 控制信号由微控制器根据颜色值分量产生。

公开(公告)号：US07852649B2

公开(公告)日：2010-12-14

申请号：US11941068

申请日：2007-11-15

申请人： Chien-Chung Hsiao

发明人： Chien-Chung Hsiao

IPC分类号： H02M7/5395

CPC分类号： H02M1/08 ,  H05B33/0815 ,  H05B33/0887 ,  Y02B20/346

摘要： In a feedback circuit of a power supply, an electrical level of an output voltage is stabilized corresponding to changes of an electrical level of a pulse width modulation signal, and effects, which are caused by spikes, on passive elements are decreased to a lowest degree. The electrical level of the output voltage is stabilized by storing a voltage corresponding to a low-to-high electrical level of the PWM signal with a capacitor, by discharging the stored voltage with a high-to-low electrical level of said PWM signal, and by regulating a discharging path of the stored voltage with a diode, which is not conducted. The abovementioned disposition may be utilized on various power-consuming devices, a duty cycle of each of which is controlled with a PWM signal, for stabilizing output voltages of said power-consuming devices, and for reducing effects, which are caused by spikes, on passive elements inside said power-consuming devices.

摘要翻译： 在电源的反馈电路中，输出电压的电平根据脉宽调制信号的电平的变化而稳定，并且由无源元件引起的尖峰效应降低到最低程度 。 通过以与所述PWM信号的高电平到低电平放电存储的电压，通过将与PWM电平的低电平相对应的电压与电容器相对应地稳定输出电压的电平， 并且通过不进行二极管调节存储电压的放电路径。 上述配置可以用于各种耗电装置，其中每一个的占空比由PWM信号控制，用于稳定所述耗电装置的输出电压，并且减少由尖峰引起的影响 所述功耗器件内的无源元件。

公开(公告)号：US20080304294A1

公开(公告)日：2008-12-11

申请号：US11941068

申请日：2007-11-15

申请人： Chien-Chung Hsiao

发明人： Chien-Chung Hsiao

IPC分类号： H02M3/335

CPC分类号： H02M1/08 ,  H05B33/0815 ,  H05B33/0887 ,  Y02B20/346

摘要： In a feedback circuit of a power supply, an electrical level of an output voltage is stabilized corresponding to changes of an electrical level of a pulse width modulation signal, and effects, which are caused by spikes, on passive elements are decreased to a lowest degree. The electrical level of the output voltage is stabilized by storing a voltage corresponding to a low-to-high electrical level of the PWM signal with a capacitor, by discharging the stored voltage with a high-to-low electrical level of said PWM signal, and by regulating a discharging path of the stored voltage with a diode, which is not conducted. The abovementioned disposition may be utilized on various power-consuming devices, a duty cycle of each of which is controlled with a PWM signal, for stabilizing output voltages of said power-consuming devices, and for reducing effects, which are caused by spikes, on passive elements inside said power-consuming devices.

摘要翻译： 在电源的反馈电路中，输出电压的电平根据脉宽调制信号的电平的变化而稳定，并且由无源元件引起的尖峰效应降低到最低程度 。 通过以与所述PWM信号的高电平到低电平放电存储的电压，通过将与PWM电平的低电平相对应的电压与电容器相对应地稳定输出电压的电平， 并且通过不进行二极管调节存储电压的放电路径。 上述配置可以用于各种耗电装置，其中每一个的占空比由PWM信号控制，用于稳定所述耗电装置的输出电压，并且减少由尖峰引起的影响 所述功耗器件内的无源元件。

公开(公告)号：US20100259572A1

公开(公告)日：2010-10-14

申请号：US12754612

申请日：2010-04-06

申请人： CHIAO-CHIH YANG ,  Chih-Hua Lin ,  Wei-Jen Chou ,  Chien-Chung Hsiao

发明人： CHIAO-CHIH YANG ,  Chih-Hua Lin ,  Wei-Jen Chou ,  Chien-Chung Hsiao

IPC分类号： G09G5/02

CPC分类号： G09G3/3611 ,  G09G3/3413 ,  G09G3/3426 ,  G09G2320/041 ,  G09G2320/0626 ,  G09G2360/145

摘要： A driving apparatus and a driving method of a backlight module are provided. The backlight module includes multiple LEDs. The driving apparatus includes at least one thermal sensor, an optical sensor, and a processor. The thermal sensor is for detecting a working temperature of the LEDs. The optical sensor is for detecting brightness and color of the backlight module after a calibration function is enabled, to obtain difference values of the detected brightness and color with respect to predetermined brightness and color. The processor is for providing at least one initial thermal compensation table, to determine working currents of the LEDs associated with the working temperature. The processor further is for calibrating a content of the initial thermal compensation table corresponding with a current working temperature of the LEDs and storing the calibrated thermal compensation table as the initial thermal compensation table after the calibration function is enabled.

摘要翻译： 提供背光模块的驱动装置和驱动方法。 背光模块包括多个LED。 驱动装置包括至少一个热传感器，光学传感器和处理器。 热传感器用于检测LED的工作温度。 光学传感器用于在启用校准功能之后检测背光模块的亮度和颜色，以获得相对于预定亮度和颜色的检测到的亮度和颜色的差值。 处理器用于提供至少一个初始热补偿表，以确定与工作温度相关联的LED的工作电流。 处理器还用于校准对应于LED的当前工作温度的初始热补偿表的内容，并且在校准功能被启用之后将校准的热补偿表存储为初始热补偿表。

公开(公告)号：US07129952B2

公开(公告)日：2006-10-31

申请号：US10176398

申请日：2002-06-21

申请人： Ruen-Rone Lee ,  Chien-Chung Hsiao ,  Lin-Tien Mei ,  Hung-Ta Pai

发明人： Ruen-Rone Lee ,  Chien-Chung Hsiao ,  Lin-Tien Mei ,  Hung-Ta Pai

IPC分类号： G06F13/14 ,  G06F15/16

CPC分类号： G06T15/005 ,  G06F3/14 ,  G06T2210/52 ,  G09G3/003 ,  G09G5/363 ,  G09G2350/00 ,  G09G2360/06

摘要： A core logic circuit which works with a CPU and a main graphics accelerator in a computer system is provided. The core logic chip includes a host controller electrically connected to the CPU for receiving a command from the CPU; an auxiliary graphing engine electrically connected to the host controller for receiving and processing the command; and a transmission controller electrically connected to the auxiliary graphing engine for transmitting the command that is processed and outputted by the auxiliary graphing engine to the main graphics accelerator to be further processed.

摘要翻译： 提供了与计算机系统中的CPU和主图形加速器一起工作的核心逻辑电路。 核心逻辑芯片包括电连接到CPU的主机控制器，用于从CPU接收命令; 电连接到主机控制器的辅助图形引擎，用于接收和处理命令; 电连接到辅助图形引擎的传输控制器，用于将由辅助图形引擎处理和输出的命令发送到主图形加速器以进一步处理。