公开(公告)号：US20150074474A1

公开(公告)日：2015-03-12

申请号：US14040374

申请日：2013-09-27

Applicant: BROADCOM CORPORATION

Inventor： Mohammad Issa ,  Rakesh Kumar Kinger

IPC: G06F11/20

CPC classification number: G11C29/4401 ,  G11C29/78 ,  G11C2029/0407 ,  G11C2029/4402

Abstract: A device for repairing a memory device may include spare memory blocks that may replace corresponding memory blocks that include at least one non-operational memory cell. One or more registers may be coupled in a chain to store memory repair information. A memory repair module may identify, upon a power-up test of the memory device, non-operational memory cells, which are incremental to previously identified defective memory cells in previous power-up tests, and may provide corresponding memory repair information of the identified non-operational memory cells. A logic circuit may block access to one or more registers and may facilitate storing, in one or more unblocked registers, the corresponding memory repair information of the identified one or more non-operational memory cells. The memory repair module may swap a memory block including the identified non-operational memory cells with a spare memory block based on content of the one or more unblocked registers.

Abstract translation: 用于修复存储器设备的设备可以包括备用存储器块，其可替代包括至少一个非操作存储器单元的对应存储器块。 一个或多个寄存器可以耦合在链中以存储存储器修复信息。 存储器修复模块可以在存储器件的上电测试时识别在先前的上电测试中对先前识别的故障存储器单元增量的非操作存储器单元，并且可以提供所识别的对应的存储器修复信息 非操作存储单元 逻辑电路可以阻止对一个或多个寄存器的访问，并且可以有助于在一个或多个未阻塞寄存器中存储所识别的一个或多个非操作存储器单元的相应存储器修复信息。 存储器修复模块可以基于一个或多个未阻塞寄存器的内容，利用备用存储块来交换包括所识别的非操作存储器单元的存储器块。

公开(公告)号：US09026747B2

公开(公告)日：2015-05-05

申请号：US13718773

申请日：2012-12-18

Applicant: Broadcom Corporation

Inventor： Weihuang Wang ,  Chien-Hsien Wu ,  Mohammad Issa

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/08 ,  G06F12/02 ,  G06F12/06 ,  G11C8/00 ,  G11C7/10

CPC classification number: G06F12/0802 ,  G06F12/0292 ,  G06F12/06 ,  G06F12/0853 ,  G06F2205/123 ,  G11C7/1075 ,  G11C8/00 ,  G11C2207/2245

Abstract: A memory device with a logical-to-physical (LTP) bank mapping cache that supports multiple read and write accesses is described herein. The memory device allows for at least one read operation and one write operation to be received during the same clock cycle. In the event that the incoming write operation is not blocked by the at least one read operation, data for that incoming write operation may be stored in the physical memory bank corresponding to a logical memory bank that is associated with the incoming write operation. In the event that the incoming write operation is blocked by the at least one read operation, then data for that incoming write operation may be stored in an unmapped physical bank that is not associated with any logical memory bank.

Abstract translation: 本文描述了具有支持多个读取和写入访问的逻辑到物理（LTP）库映射缓存的存储器件。 存储器件允许在相同的时钟周期期间接收至少一个读取操作和一个写入操作。 在进入写入操作未被至少一个读取操作阻止的情况下，用于该输入写入操作的数据可以存储在对应于与输入写入操作相关联的逻辑存储器组的物理存储体中。 在进入写入操作被至少一个读取操作阻止的情况下，用于该输入写入操作的数据可以存储在未与任何逻辑存储体相关联的未映射的物理存储体中。

公开(公告)号：US20140052912A1

公开(公告)日：2014-02-20

申请号：US13718773

申请日：2012-12-18

Applicant: BROADCOM CORPORATION

Inventor： Weihuang Wang ,  Chien-Hsien Wu ,  Mohammad Issa

IPC: G06F12/08

CPC classification number: G06F12/0802 ,  G06F12/0292 ,  G06F12/06 ,  G06F12/0853 ,  G06F2205/123 ,  G11C7/1075 ,  G11C8/00 ,  G11C2207/2245

Abstract: A memory device with a logical-to-physical (LTP) bank mapping cache that supports multiple read and write accesses is described herein. The memory device allows for at least one read operation and one write operation to be received during the same clock cycle. In the event that the incoming write operation is not blocked by the at least one read operation, data for that incoming write operation may be stored in the physical memory bank corresponding to a logical memory bank that is associated with the incoming write operation. In the event that the incoming write operation is blocked by the at least one read operation, then data for that incoming write operation may be stored in an unmapped physical bank that is not associated with any logical memory bank.

Abstract translation: 本文描述了具有支持多个读取和写入访问的逻辑到物理（LTP）库映射缓存的存储器件。 存储器件允许在相同的时钟周期期间接收至少一个读取操作和一个写入操作。 在进入写入操作未被至少一个读取操作阻止的情况下，用于该输入写入操作的数据可以存储在对应于与输入写入操作相关联的逻辑存储器组的物理存储体中。 在进入写入操作被至少一个读取操作阻止的情况下，用于该输入写入操作的数据可以存储在未与任何逻辑存储体相关联的未映射的物理存储体中。

公开(公告)号：US20130154796A1

公开(公告)日：2013-06-20

申请号：US13764992

申请日：2013-02-12

Applicant: Broadcom Corporation

Inventor： Wael W. Diab ,  Mohammad Issa

IPC: G05B1/01

CPC classification number: G05B1/01 ,  G06F21/32 ,  G06F21/35 ,  G06F2221/2115 ,  H04L63/0861 ,  H04W12/08

Abstract: There is provided a system for secure profile setting that includes at least one shared device and an RFID reader module embedded in the at least one shared device. The system further includes a database that is in communication with the at least one shared device. In the system, an RFID transponder module associated with a user transmits a signal that enables the at least one shared device to identify the user. The RFID transponder module can include a fingerprint scanner module, which can be used to acquire a user's fingerprint data to authenticate the user. Thus, after identifying the user, the at least one shared device retrieves a profile corresponding to the user from the database and sets the profile.

Abstract translation: 提供了一种用于安全配置文件设置的系统，其包括至少一个共享设备和嵌入至少一个共享设备中的RFID读取器模块。 该系统还包括与至少一个共享设备通信的数据库。 在系统中，与用户相关联的RFID应答器模块发送使至少一个共享设备能够识别用户的信号。 RFID应答器模块可以包括指纹扫描器模块，其可以用于获取用户的指纹数据以认证用户。 因此，在识别用户之后，至少一个共享设备从数据库检索对应于用户的简档，并设置简档。