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1.发明申请公开(公告)号：US20200042153A1
公开(公告)日：2020-02-06
申请号：US16374744
申请日：2019-04-03
Inventor： Tong Yang
Abstract: A shift register unit and a method for driving the same, a gate driving circuit, and a touch display apparatus are disclosed. The shift register unit includes: an input circuit configured to output an input signal received at an input signal terminal to a pull-up node; an output circuit configured to output a gate driving signal at an output signal terminal under control of a clock signal; a reset circuit configured to reset the pull-up node to a first level under control of a reset signal; a pull-down control circuit configured to control a level at the output signal terminal using the first level at a first level terminal under control of a control signal and the level at the pull-up node; and a compensation circuit configured to compensate for the level at the pull-up node using a compensation signal under control of the level at the pull-up node.
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公开(公告)号：US20190251928A1
公开(公告)日：2019-08-15
申请号：US16056912
申请日：2018-08-07
Inventor： Ruifang Du , Tong Yang , Xiaoye Ma
IPC: G09G5/00
Abstract: Embodiments of the disclosure provide a gate driver, a display apparatus and a method for controlling the gate driver. The gate driver comprises a plurality of clock signal terminals; a controlling signal terminal; and N stages of cascaded gate driving circuits. Each of the N stages of cascaded gate driving circuits is configured to pull-up a voltage of an outputting terminal of the gate driving circuit according to a signal at the respective clock signal terminal, and to perform a noise reduction operation according to a signal at the controlling signal terminal. A controller is coupled with the clock signal terminals and the controlling signal terminal, and is configured to detect signals at the plurality of clock signal terminals, and to output a valid level signal to the controlling signal terminal in response to the signal at the clock signal terminal being abnormal.
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公开(公告)号：US10019094B2
公开(公告)日：2018-07-10
申请号：US15510415
申请日：2016-09-05
Inventor： Tong Yang , Tingting Zhao
CPC classification number: G06F3/0412 , G06F3/0416 , G06F3/044 , G06F2203/04103 , G06F2203/04112
Abstract: The present application discloses a display panel having a first display substrate and a second display substrate facing the first display substrate, the display panel includes a floating electrode layer including a plurality of floating electrodes on the first display substrate; the floating electrode layer being spaced apart from the second display substrate by a distance; a driving electrode layer including a plurality of driving electrodes on the second display substrate; and a sensor electrode layer including a plurality of sensor electrodes on the second display substrate; each of the plurality of floating electrodes corresponding to a pair of driving electrode and sensor electrode. The floating electrode layer, the driving electrode layer, and the sensor electrode layer are configured so that at least one of the plurality of floating electrodes is movable relative to at least one of a corresponding driving electrode and a corresponding sensor electrode in response to a pressure from a touch, resulting in a detectable capacitance change between the corresponding driving electrode and the corresponding sensor electrode.
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公开(公告)号：US09502134B2
公开(公告)日：2016-11-22
申请号：US14041293
申请日：2013-09-30
Inventor： Tong Yang , Rui Ma , Xianjie Shao , Ming Hu
CPC classification number: G11C19/28 , G09G3/3677 , G09G2310/0202 , G09G2310/0286
Abstract: The disclosure relates to a shift register, a method for driving the same, an array substrate and a display apparatus, for reducing the wiring space as required by the shift register. The shift register comprising a control unit and a plurality of output sub-units, wherein the control unit comprises a plurality of output terminals which output gate line control signals sequentially according to the control timing sequence during a first preset time period, and output the gate line control signals sequentially according to the control timing sequence during a second preset time period in an order opposite to or identical to an order in which the gate line control signals are output during the first preset time period; each of the output sub-units is connected to a corresponding output terminal of the control unit, and divides the gate line control signal output from the connected output terminal into at least a first gate line control signal and a second gate line control signal, and outputs the first gate line control signal and the second gate line control signal respectively.
Abstract translation: 本发明涉及一种用于减少移位寄存器所要求的布线空间的移位寄存器，其驱动方法，阵列基板和显示装置。 移位寄存器包括控制单元和多个输出子单元，其中控制单元包括多个输出端，其在第一预设时间周期期间根据控制定时序列顺序地输出栅极线控制信号，并输出该门 在与第一预设时间段期间输出栅极线控制信号的顺序相反或相同的顺序，根据第二预设时间段期间的控制定时序列顺序地控制信号; 每个输出子单元连接到控制单元的对应输出端，并将从连接的输出端输出的栅极线控制信号分成至少第一栅极线控制信号和第二栅极线控制信号，以及 分别输出第一栅极线控制信号和第二栅极线控制信号。
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公开(公告)号：US20150248940A1
公开(公告)日：2015-09-03
申请号：US14365840
申请日：2013-06-21
CPC classification number: G11C19/28 , G09G3/3648 , G09G3/3677 , G09G2310/0286
Abstract: There are provided a shift register unit and a display device in embodiments of the present disclosure, for solving the problem that since two different transistors are used to respectively pull-up and pull-down a gate line connected to a conventional shift register unit, the conventional shift register unit occupies a large area, which causes a large consumption of materials when manufacturing the shift register unit, a high cost of the conventional shift register unit, and a high cost of a display device comprising the conventional shift register unit. The shift register unit comprises: a first capacitor, a first transistor, a pull-up module and a first pull-down module, wherein the first capacitor has a first electrode configured to receive a clock signal, a gate connected with one terminal of the first capacitor, the pull-up module and the first pull-down module, and a second electrode connected with the other terminal of the first capacitor. The first transistor in the shift register unit pull-up or pull-down the level at the gate line connected to the shift register unit.
Abstract translation: 在本公开的实施例中提供了移位寄存器单元和显示装置，为了解决由于使用两个不同的晶体管分别上拉和下拉连接到常规移位寄存器单元的栅极线的问题， 传统的移位寄存器单元占据大面积，这在制造移位寄存器单元时造成材料消耗大，传统移位寄存器单元成本高，并且包括常规移位寄存器单元的显示装置的高成本。 移位寄存器单元包括：第一电容器，第一晶体管，上拉模块和第一下拉模块，其中第一电容器具有被配置为接收时钟信号的第一电极，与第一电容器的一个端子连接的栅极 第一电容器，上拉模块和第一下拉模块，以及与第一电容器的另一端子连接的第二电极。 移位寄存器单元中的第一个晶体管将连接到移位寄存器单元的栅极线上的电平上拉或下拉。
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Patent Agency Ranking
公开(公告)号：US12292638B2
公开(公告)日：2025-05-06
申请号：US18698378
申请日：2021-10-15
Inventor： Fengzhen Lv , Yongxian Xie , Zhixiang Zou , Chuanjiang Tang , Feng Qu , Tong Yang , Xiaoye Ma , Ran Zhang
IPC: G02F1/1333 , G02F1/1339 , G02F1/1343 , G02F1/1362 , H10D86/40 , H10D86/60
Abstract: An array substrate includes a base substrate, including a display area and a peripheral area; a driving circuit layer, located at one side of the base substrate and including a plurality of data lines and a plurality of scanning lines, where the plurality of data lines extend along a first direction and are arranged at intervals along a second direction, the plurality of scanning lines extend along the second direction and are arranged at intervals along the first direction, and the data line and the scanning line intersect with each other to define a plurality of sub-pixel areas; and a metal layer, located at one side of the driving circuit layer away from the base substrate, where the metal layer includes a plurality of metal blocks arranged at intervals, and the metal block is located at an intersection of the data line and the scanning line.
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公开(公告)号：US11804843B2
公开(公告)日：2023-10-31
申请号：US17309849
申请日：2020-12-29
Inventor： Tong Yang , Xianjie Shao , Tingting Zhao
IPC: H03K19/0175 , H03K19/173 , H03K19/17736
CPC classification number: H03K19/017509 , H03K19/1737 , H03K19/17744
Abstract: A selection circuit, a method for controlling the selection circuit, and a multiplexing circuit are provided. The selection circuit includes N control circuits and M booster circuits. Control terminals of M control circuits among the N control circuits are coupled to output terminals of the M booster circuits, respectively, and first input terminals of the M booster circuits are coupled to receive M control signals among N control signals, respectively. Second input terminals of the M booster circuits are coupled to receive M boost signals respectively, and each booster circuit is configured to provide the received control signal to an output terminal of the booster circuit and increase a potential at the output terminal of the booster circuit by using the received boost signal.
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公开(公告)号：US11719983B2
公开(公告)日：2023-08-08
申请号：US16986748
申请日：2020-08-06
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yang Yue , Qi Yao , Yong Yu , Hua Huang , Tong Yang , Shi Shu , Chuanxiang Xu , Xue Jiang , Haitao Huang , Xiang Li , Zhao Cui
IPC: G02F1/1347 , G02F1/1335 , G02F1/13357 , G02F1/1339 , G02F1/1343 , G02F1/1362
CPC classification number: G02F1/1347 , G02F1/13394 , G02F1/13396 , G02F1/13398 , G02F1/13471 , G02F1/133512 , G02F1/133514 , G02F1/133528 , G02F1/133617 , G02F1/134309 , G02F1/136286 , G02F1/133548 , G02F1/133614 , G02F2201/121 , G02F2201/123
Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes: a first medium and a first spacer wall between the first substrate and the second substrate, wherein the first sub-panel has filter pixels arranged at intervals, the first spacer wall is black and arranged along spaces between filter pixels, and a dielectric coefficient of the first spacer wall is greater than that of the first medium; and a second sub-panel on a light emergent side of the first sub-panel and including a second medium and a second spacer wall between the third substrate and the fourth substrate, wherein the second sub-panel has display pixels arranged at intervals, the second spacer wall is black and arranged along spaces between display pixels, and a dielectric coefficient of the second spacer wall is greater than that of the second medium.
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公开(公告)号：US11189243B2
公开(公告)日：2021-11-30
申请号：US16829263
申请日：2020-03-25
Inventor： Chuanjiang Tang , Tong Yang , Xianjie Shao
IPC: G09G3/36
Abstract: A shift register unit, a driving method thereof, a gate driving circuit, and a display device. The shift register unit comprises an input circuit, a control circuit, a reset circuit, an output circuit and a first capacitor, where the input circuit provides a signal from an input signal terminal to a first node; the control circuit controls signals from the first node and a second node; the reset circuit provides a signal from a reference signal terminal to the first node; the output circuit provides a signal from a clock signal terminal to a signal output terminal, and provides the signal from the reference signal terminal to the signal output terminal; and the first capacitor is coupled between the clock signal terminal and the second node.
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10.发明申请SHIFT REGISTER UNIT AND METHOD FOR DRIVING SAME, SHIFT REGISTER CIRCUIT AND DISPLAY APPARATUS 审中-公开移位寄存器单元及其驱动方法，移位寄存器电路和显示设备公开(公告)号：US20160351159A1
公开(公告)日：2016-12-01
申请号：US14912635
申请日：2015-07-29
Inventor： Tong Yang , Rui Ma , Guolei Wang
Abstract: The present disclosure provides provide a shift register unit and a method for driving the shift register unit, a shift register circuit and a display apparatus. The shift register unit comprises: a charging module connected to an input terminal and a pull-up node and configured to generate a pull-up signal; a pull-up module connected to the pull-up node, a first clock signal terminal and an output terminal of the shift register unit, and configured to charge the output terminal of the shift register unit; a first pull-down control module connected to a second clock signal terminal, the pull-up node, a low voltage terminal and a pull-down control node, and configured to generate a pull-down control signal; a second pull-down control module connected to the pull-down control node, the pull-up node, the second clock signal terminal, the low voltage terminal and the pull-down node, and configured to generate a pull-down signal; a first pull-down module connected to a first reset terminal, the output terminal of the shift register unit and the low voltage terminal, and configured to discharge the output terminal of the shift register unit; a second pull-down module connected to a pull-down node, the second clock signal terminal, the output terminal of the shift register unit, the pull-up node and the low voltage terminal, and configured to discharge the output terminal of the shift register unit; and a reset module connected to a second reset terminal, the pull-up node and the low voltage terminal, and configured to reset the pull-up node.
Abstract translation: 本公开提供了一种移位寄存器单元和用于驱动移位寄存器单元的方法，移位寄存器电路和显示装置。 移位寄存器单元包括：连接到输入端子和上拉节点并被配置为产生上拉信号的充电模块; 连接到上拉节点的上拉模块，移位寄存器单元的第一时钟信号端子和输出端子，并且被配置为对移位寄存器单元的输出端子充电; 第一下拉控制模块，连接到第二时钟信号端子，上拉节点，低电压端子和下拉控制节点，并且被配置为产生下拉控制信号; 连接到下拉控制节点，上拉节点，第二时钟信号端子，低电压端子和下拉节点的第二下拉控制模块，并且被配置为产生下拉信号; 连接到第一复位端子的第一下拉模块，移位寄存器单元的输出端子和低电压端子，并且被配置为对移位寄存器单元的输出端子进行放电; 连接到下拉节点的第二下拉模块，第二时钟信号端子，移位寄存器单元的输出端子，上拉节点和低电压端子，并且被配置为对移位的输出端子进行放电 注册单位 以及连接到第二复位端子，上拉节点和低电压端子并且被配置为复位上拉节点的复位模块。
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