公开(公告)号：US3823352A

公开(公告)日：1974-07-09

申请号：US31478572

申请日：1972-12-13

Applicant: BELL TELEPHONE LABOR INC

Inventor： PRUNIAUX B ,  RILEY T ,  RYDER R ,  WAGGENER H

IPC: H01L21/00 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/78 ,  H01L29/812 ,  H01L11/00 ,  B01J17/00

CPC classification number: H01L29/7813 ,  H01L21/00 ,  H01L29/0638 ,  H01L29/0657 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/8124 ,  H01L2924/10158

Abstract: A field effect transistor is made in a mesa configuration with the top portion of the mesa being the source region and with the limits of the gate electrode being defined by a shadow mask that overhangs part of the mesa. A drift region layer of moderately high resistivity is included between the transistor channel region and the drain region and constitutes the upper wafer substrate surface from which the mesa extends. A thin implanted layer in the upper surface of the drift region layer limits the extent of the channel in the mesa, and a thick oxide over the drift layer reduces the coupling from the gate electrode to the drift region.

公开(公告)号：US3761785A

公开(公告)日：1973-09-25

申请号：US3761785D

申请日：1971-04-23

Applicant: BELL TELEPHONE LABOR INC

Inventor： PRUNIAUX B

IPC: H01L21/00 ,  H01L21/306 ,  H01L29/08 ,  H01L29/78 ,  H01L29/812 ,  H01L11/00

CPC classification number: H01L29/8122 ,  H01L21/00 ,  H01L21/30608 ,  H01L29/0847 ,  H01L29/7827 ,  Y10S148/037 ,  Y10S148/051 ,  Y10S148/085 ,  Y10S148/106 ,  Y10S438/944

Abstract: A high frequency field effect transistor is made by first epitaxially growing semiconductor channel and drain layers over a source layer. An oxide layer is formed on the upper drain layer which acts as a mask during etching of the epitaxial layers. Anisotropic etching of the semiconductor forms a mesa configuration of the channel and drain layers which is overlapped by the upper oxide layer. Metal is then evaporated onto the mesa from a point opposite the oxide layer. The overhanging oxide layer masks part of the mesa, particularly the drain layer, to define precisely the area covered by the evaporated gate contact, as required for high frequency operation. Other embodiments are also described.

Abstract translation: 通过在源极层上首先外延生长半导体沟道和漏极层来制造高频场效应晶体管。 在蚀刻外延层期间作为掩模的上漏极层上形成氧化物层。 半导体的各向异性蚀刻形成与上部氧化物层重叠的沟道层和漏极层的台面构造。 然后将金属从与氧化物层相对的点蒸发到台面上。 突出的氧化物层掩盖台面的一部分，特别是漏极层，以精确地限定由蒸发的栅极接触覆盖的区域，这是高频操作所需要的。 还描述了其它实施例。