Particle Reduction in Physical Vapor Deposition of Amorphous Silicon

    公开(公告)号:US20240128075A1

    公开(公告)日:2024-04-18

    申请号:US18378234

    申请日:2023-10-10

    CPC classification number: H01L21/02164 C23C16/52 H01L21/0228 H01L21/0262

    Abstract: Methods for depositing amorphous silicon films via physical vapor deposition processes are disclosed. In some embodiments, a method of depositing amorphous silicon in a physical vapor deposition (PVD) process chamber includes (a) depositing an amorphous silicon layer atop a surface of a substrate disposed on a substrate support via a physical vapor deposition process, in the meanwhile amorphous silicon is also deposited atop components within the PVD process chamber; and depositing a glue layer atop the amorphous silicon deposited on the components. The glue layer can be a silicon compound. The silicon compound can be a compound of silicon with one or more of carbon, nitrogen, or oxygen. In some embodiments, the silicon compound is SiC, SiN, SiO, SiCN, or SiON.

    METHODS OF REDUCING PARTICLES IN A PHYSICAL VAPOR DEPOSITION (PVD) CHAMBER

    公开(公告)号:US20220301828A1

    公开(公告)日:2022-09-22

    申请号:US17203786

    申请日:2021-03-17

    Abstract: Embodiments of methods and apparatus for reducing particle formation in physical vapor deposition (PVD) chambers are provided herein. In some embodiments, a method of reducing particle formation in a PVD chamber includes: performing a plurality of first deposition processes on a corresponding series of substrates disposed on a substrate support in the PVD chamber, wherein the PVD chamber includes a cover ring disposed about the substrate support and having a texturized outer surface, and wherein a silicon nitride (SiN) layer having a first thickness is deposited onto the texturized outer surface during each of the plurality of first deposition processes; and performing a second deposition process on the cover ring between subsets of the plurality of first deposition processes to deposit an amorphous silicon layer having a second thickness onto an underlying silicon nitride (SiN) layer.

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