公开(公告)号：US20160322200A1

公开(公告)日：2016-11-03

申请号：US15142022

申请日：2016-04-29

申请人： Applied Materials, Inc.

发明人： Kaushik ALAYAVALLI ,  Xinhai HAN ,  Praket P. JHA ,  Masaki OGATA ,  Zhijun JIANG ,  Allen KO ,  Ndanka O. MUKUTI ,  Thuy BRITCHER ,  Amit Kumar BANSAL ,  Ganesh BALASUBRAMANIAN ,  Juan Carlos ROCHA-ALVAREZ ,  Bok Hoen KIM

IPC分类号： H01J37/32 ,  C23C16/509 ,  C23C16/455

CPC分类号： H01J37/3244 ,  C23C16/4404 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/509 ,  H01J37/32091

摘要： A method and apparatus for a dual-channel showerhead is provided. In one embodiment the showerhead comprises a body comprising a conductive material having a plurality of first openings formed therethrough comprising a first gas channel and a plurality of second openings formed therethrough comprising a second gas channel that is fluidly separated from the first gas channel, wherein each of the first openings having a geometry that is different than each of the second openings.

摘要翻译： 提供了一种双通道花洒的方法和装置。 在一个实施例中，喷头包括主体，该主体包括导电材料，该导电材料具有多个形成的第一开口，其包括第一气体通道和穿过其中形成的多个第二开口，其包括与第一气体通道流体分离的第二气体通道， 的第一开口具有与每个第二开口不同的几何形状。

公开(公告)号：US20160293609A1

公开(公告)日：2016-10-06

申请号：US15063569

申请日：2016-03-08

申请人： Applied Materials, Inc.

发明人： Praket P. JHA ,  Allen KO ,  Xinhai HAN ,  Thomas Jongwan KWON ,  Bok Hoen KIM ,  Byung Ho KIL ,  Ryeun KIM ,  Sang Hyuk KIM

IPC分类号： H01L27/115 ,  H01L21/311 ,  C23C16/455 ,  C23C16/40 ,  C23C16/34 ,  H01L29/423 ,  H01L21/02

CPC分类号： C23C16/345 ,  C23C16/401 ,  C23C16/45523 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/31116 ,  H01L27/11556 ,  H01L27/11582

摘要： Implementations of the present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.

摘要翻译： 本公开的实施方式一般涉及包含高纵横比特征定义的薄膜及其形成方法。 随着栅极高度的增加，3D NAND栅极堆叠受到更高的纵横比蚀刻。 由于蚀刻技术的当前局限性，垂直蚀刻轮廓通常随着进入栅极堆叠的深度而增加。 本发明人设计了一种独特的沉积方案，其通过新颖的等离子体增强化学气相沉积（PECVD）膜沉积方法来补偿深沟槽中的蚀刻性能降低。 本发明人已经发现，通过分级沉积膜（例如，氮化硅）的各种性质（例如，折射率，膜的应力，膜中的掺杂剂浓度），可以通过补偿变化来实现更均匀的蚀刻轮廓 干和湿蚀刻速率。

公开(公告)号：US20190185996A1

公开(公告)日：2019-06-20

申请号：US16269337

申请日：2019-02-06

申请人： Applied Materials, Inc.

发明人： Praket P. JHA ,  Allen KO ,  Xinhai HAN ,  Thomas Jongwan KWON ,  Bok Hoen KIM ,  Byung Ho KIL ,  Ryeun KIM ,  Sang Hyuk KIM

IPC分类号： C23C16/34 ,  H01L21/02 ,  H01L21/311 ,  C23C16/455 ,  C23C16/40

CPC分类号： C23C16/345 ,  C23C16/401 ,  C23C16/45523 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/31116 ,  H01L27/11556 ,  H01L27/11582

摘要： The present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.

公开(公告)号：US20170162417A1

公开(公告)日：2017-06-08

申请号：US15370682

申请日：2016-12-06

申请人： Applied Materials, Inc.

发明人： Zheng John YE ,  Hiroji HANAWA ,  Juan Carlos ROCHA-ALVAREZ ,  Pramit MANNA ,  Michael Wenyoung TSIANG ,  Allen KO ,  Wenjiao WANG ,  Yongjing LIN ,  Prashant Kumar KULSHRESHTHA ,  Xinhai HAN ,  Bok Hoen KIM ,  Kwangduk Douglas LEE ,  Karthik Thimmavajjula NARASIMHA ,  Ziqing DUAN ,  Deenesh PADHI

IPC分类号： H01L21/683 ,  C23C16/505 ,  C23C16/458

CPC分类号： H01L21/6833 ,  C23C16/4586 ,  C23C16/509 ,  H01J37/32091 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556

摘要： Techniques are disclosed for methods and apparatuses of an electrostatic chuck suitable for operating at high operating temperatures. In one example, a substrate support assembly is provided. The substrate support assembly includes a substantially disk-shaped ceramic body having an upper surface, a cylindrical sidewall, and a lower surface. The upper surface is configured to support a substrate thereon for processing the substrate in a vacuum processing chamber. The cylindrical sidewall defines an outer diameter of the ceramic body. The lower surface is disposed opposite the upper surface. An electrode is disposed in the ceramic body. A circuit is electrically connected to the electrode. The circuit includes a DC chucking circuit, a first RF drive circuit, and a second RF dive circuit. The DC chucking circuit, the first RF drive circuit and the second RF drive circuit are electrically coupled with the electrode.