Self referenced single-ended chip to chip communication

    公开(公告)号:US11750325B2

    公开(公告)日:2023-09-05

    申请号:US16933449

    申请日:2020-07-20

    Applicant: Apple Inc.

    Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.

    SELF REFERENCED SINGLE-ENDED CHIP TO CHIP COMMUNICATION

    公开(公告)号:US20200235856A1

    公开(公告)日:2020-07-23

    申请号:US16253100

    申请日:2019-01-21

    Applicant: Apple Inc.

    Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.

    High Speed ESD Protection Circuit

    公开(公告)号:US20220077679A1

    公开(公告)日:2022-03-10

    申请号:US17014894

    申请日:2020-09-08

    Applicant: Apple Inc.

    Abstract: An ESD protection circuit is disclosed. The ESD protection circuit is coupled between a first node and a second node that is coupled to an input of a functional circuit. A first protection circuit is coupled to the first node. The circuit further includes a first path and a second path. The first path includes a second protection circuit that is coupled to the second node, and is AC coupled to the first node. A second circuit path includes a third protection circuit, a resistor coupled between the third protection circuit and the first node, and a switch having a first terminal coupled to the resistor and the third protection circuit. A shunt circuit includes a transistor having a gate terminal coupled to the second terminal of the switch. The transistor, when activated, shunts current from the second node to ground.

    High speed ESP protection circuit

    公开(公告)号:US11322935B2

    公开(公告)日:2022-05-03

    申请号:US17014894

    申请日:2020-09-08

    Applicant: Apple Inc.

    Abstract: An ESD protection circuit is disclosed. The ESD protection circuit is coupled between a first node and a second node that is coupled to an input of a functional circuit. A first protection circuit is coupled to the first node. The circuit further includes a first path and a second path. The first path includes a second protection circuit that is coupled to the second node, and is AC coupled to the first node. A second circuit path includes a third protection circuit, a resistor coupled between the third protection circuit and the first node, and a switch having a first terminal coupled to the resistor and the third protection circuit. A shunt circuit includes a transistor having a gate terminal coupled to the second terminal of the switch. The transistor, when activated, shunts current from the second node to ground.

    Self Referenced Single-Ended Chip to Chip Communication

    公开(公告)号:US20210099252A1

    公开(公告)日:2021-04-01

    申请号:US16933449

    申请日:2020-07-20

    Applicant: Apple Inc.

    Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.

    Self referenced single-ended chip to chip communication

    公开(公告)号:US10756849B2

    公开(公告)日:2020-08-25

    申请号:US16253100

    申请日:2019-01-21

    Applicant: Apple Inc.

    Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.

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