公开(公告)号：US10055369B1

公开(公告)日：2018-08-21

申请号：US15470643

申请日：2017-03-27

Applicant: Apple Inc.

Inventor： Charles E. Tucker ,  Erik P. Machnicki ,  Fan Wu ,  John H. Kelm

IPC: G06F13/26 ,  G06F13/34 ,  H04L12/46 ,  G06F9/48 ,  H04L12/801 ,  G06F9/50

CPC classification number: G06F13/26 ,  G06F9/4812 ,  G06F9/4825 ,  G06F9/4843 ,  G06F9/5038 ,  G06F13/34 ,  H04L12/46 ,  H04L47/29 ,  Y02D10/14

Abstract: Systems, apparatuses, and methods for coalescing interrupts temporally for later processing are described. An interrupt controller in a computing system maintains a timer for tracking an amount of time remaining after receiving an interrupt before a processor is awakened to service the interrupt. For a received interrupt with a latency tolerance greater than a threshold, the interrupt controller compares a value currently stored in the timer and the latency tolerance selected based on class. The smaller value is retained in the timer. When the timer expires, the interrupt controller sends wakeup indications to one or more processors and indications of the waiting interrupts.