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公开(公告)号：US12216515B2
公开(公告)日：2025-02-04
申请号：US18497443
申请日：2023-10-30
Applicant: Apple Inc.
Inventor： Shawn Searles , Fabio Gozzini , Sanjay Pant , Inder M. Sodhi
Abstract: A power converter circuit included in a computer system may include a phase circuit and a sample circuit. The phase circuit compares a voltage level of the regulated power supply node to a reference voltage to generate a demand current that is used to adjust the voltage level of the regulated power supply node. The phase circuit also digitizes the demand current and stores the resultant bit stream in a memory circuit. The sample circuit generates timestamp information that points to particular storage locations in the memory circuit that correspond to trigger events, allowing the operation of the power converter circuit to be analyzed during different circumstances as well as to adjust operating parameters of the power converter circuit.
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公开(公告)号：US11962245B2
公开(公告)日：2024-04-16
申请号：US18168276
申请日：2023-02-13
Applicant: Apple Inc.
Inventor： Sanjay Pant , Fabio Gozzini , Hubert Attah , Jonathan F. Bolus , Wenxun Huang
IPC: H02M3/157 , G06F1/3203 , H02M3/158 , H03M1/12
CPC classification number: H02M3/1584 , G06F1/3203 , H02M3/157 , H03M1/12 , H02M3/1586
Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits coupled to a regulated power supply line via corresponding one of multiple inductors. The phase circuits may modify a voltage level of the regulated power supply line using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.
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公开(公告)号：US11323033B2
公开(公告)日：2022-05-03
申请号：US17201712
申请日：2021-03-15
Applicant: Apple Inc.
Inventor： Sanjay Pant , Fabio Gozzini , Hubert Attah , Jonathan F. Bolus , Wenxun Huang
IPC: H02M3/158 , H02M1/12 , H02M3/157 , G06F1/3203 , H03M1/12
Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.
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公开(公告)号：US20220094267A1
公开(公告)日：2022-03-24
申请号：US17031764
申请日：2020-09-24
Applicant: Apple Inc.
Inventor： Shawn Searles , Fabio Gozzini
Abstract: A method and apparatus for rapid discharge of power rails is disclosed. A circuit includes a power converter circuit includes an inductor coupled between a switch node and regulated power supply node. A first device is coupled between an input power supply node and the switch node, while a second device is coupled between the switch node and a ground node. The power converter is configured to generate a particular voltage level on the regulated power supply node by controlling the first and second devices. The circuit also includes a control circuit which, in response to receiving a discharge comment, repeatedly activates and deactivates the second device to discharge, via the switch node and the inductor, the regulated power supply node.
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公开(公告)号：US10809751B1
公开(公告)日：2020-10-20
申请号：US16508910
申请日：2019-07-11
Applicant: Apple Inc.
Inventor： Jonathan F. Bolus , Fabio Gozzini
Abstract: A power converter circuit that includes a switch node coupled to a regulated power supply node via an inductor may, during a charge cycle, source current to the regulated power supply node. In response to initiating the charge cycle, a control circuit may generate a control current using a voltage level of the regulated power supply node and a reference voltage level. The control circuit may also generate compensation and correction currents that are used with a sensed inductor current to determine when to halt the charge cycle.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20170090501A1
公开(公告)日：2017-03-30
申请号：US14870661
申请日：2015-09-30
Applicant: Apple Inc.
Inventor： Jay B. Fletcher , Shawn Searles , Fabio Gozzini , Sanjay Pant
IPC: G05F3/08
Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to a common output node. Each of the phase units may be configured to source current to the output node in response to the assertion of a respective clock signal in order to generate a regulated supply voltage. Each phase unit includes a respective transconductance amplifier configured to generate a respective demand current dependent upon a reference voltage and the regulated supply voltage.
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公开(公告)号：US11803219B2
公开(公告)日：2023-10-31
申请号：US17211527
申请日：2021-03-24
Applicant: Apple Inc.
Inventor： Shawn Searles , Fabio Gozzini , Sanjay Pant , Inder M. Sodhi
CPC classification number: G06F1/26 , G01R15/146 , G11C7/1096
Abstract: A power converter circuit included in a computer system may include a phase circuit and a sample circuit. The phase circuit compares a voltage level of the regulated power supply node to a reference voltage to generate a demand current that is used to adjust the voltage level of the regulated power supply node. The phase circuit also digitizes the demand current and stores the resultant bit stream in a memory circuit. The sample circuit generates timestamp information that points to particular storage locations in the memory circuit that correspond to trigger events, allowing the operation of the power converter circuit to be analyzed during different circumstances as well as to adjust operating parameters of the power converter circuit.
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公开(公告)号：US11581813B2
公开(公告)日：2023-02-14
申请号：US17661693
申请日：2022-05-02
Applicant: Apple Inc.
Inventor： Sanjay Pant , Fabio Gozzini , Hubert Attah , Jonathan F. Bolus , Wenxun Huang
IPC: H02M3/158 , H03M1/12 , H02M3/157 , G06F1/3203
Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.
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公开(公告)号：US20220255436A1
公开(公告)日：2022-08-11
申请号：US17661693
申请日：2022-05-02
Applicant: Apple Inc.
Inventor： Sanjay Pant , Fabio Gozzini , Hubert Attah , Jonathan F. Bolus , Wenxun Huang
IPC: H02M3/158 , H02M3/157 , G06F1/3203 , H03M1/12
Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.
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公开(公告)号：US10122269B2
公开(公告)日：2018-11-06
申请号：US15402827
申请日：2017-01-10
Applicant: Apple Inc.
Inventor： Fabio Gozzini , Jay B. Fletcher , Shawn Searles , Sanjay Pant
Abstract: A system that includes a regulator circuit is disclosed. The regulator circuit includes first and second phase units whose outputs are coupled to a power supply node of a circuit block, via respective coupled inductors. The first phase unit may initiate a charge cycle of the power supply node in response to assertion of a clock signal and generate a compensated current using currents measure through both inductors and the clock signal. In response to a determination that the compensated current is greater than a demand current generated using a voltage level of the power supply node and a reference voltage, the first phase unit may halt the charge cycle.
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