公开(公告)号：US09443830B1

公开(公告)日：2016-09-13

申请号：US14734951

申请日：2015-06-09

Applicant: Apple Inc.

Inventor： Corey N. Axelowitz ,  Eric C. Lee ,  Shawn Xavier Arnold

IPC: H01L25/065 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83851 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06558 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/15313 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Electrical components such as semiconductor die may be mounted in semiconductor packages and embedded within printed circuits. A printed circuit may have a substrate with an opening and may have metal layers. During lamination operations, substrate material such as prepreg may flow and form embedding dielectric material that embeds the semiconductor die within the opening. Double-sided semiconductor dies may be formed by attaching multiple semiconductor dies together using a layer of material such as die attach film. The double-sided semiconductor dies may be embedded within a printed circuit and mounted in semiconductor packages. Wire bond wires may be used to couple one of the semiconductor dies in a double-sided semiconductor die to contacts on a substrate. Wire bond wires may also be used to couple a shield layer to the substrate.

Abstract translation: 诸如半导体管芯的电气部件可以安装在半导体封装中并嵌入印刷电路中。 印刷电路可以具有带有开口的基底并且可以具有金属层。 在层压操作期间，诸如预浸料的基底材料可以流动并形成将半导体管芯嵌入开口内的电介质材料。 可以使用诸如管芯附着膜的材料层将多个半导体管芯附接在一起来形成双面半导体管芯。 双面半导体管芯可以嵌入印刷电路中并安装在半导体封装中。 引线键合线可以用于将双面半导体管芯中的半导体管芯中的一个耦合到衬底上的接触。 引线键合线也可用于将屏蔽层耦合到基板。