公开(公告)号：US09256551B2

公开(公告)日：2016-02-09

申请号：US13963457

申请日：2013-08-09

Applicant: Apple Inc.

Inventor： Timothy R. Paaske ,  David S. Warren ,  Michael J. Smith ,  Diarmuid P. Ross ,  Weihua Mao

IPC: H04L29/06 ,  G06F12/14 ,  H04L9/12 ,  G06F21/60 ,  G06F21/72 ,  G06F21/85 ,  G06F21/87 ,  G09C1/00

CPC classification number: G06F12/1408 ,  G06F21/602 ,  G06F21/72 ,  G06F21/85 ,  G06F21/87 ,  G09C1/00 ,  H04L9/12 ,  H04L2209/12

Abstract: In an embodiment, a peripheral interface controller may include an inline cryptographic engine which may encrypt data being sent over a peripheral interface and decrypt data received from the peripheral interface. The encryption may be transparent to the device connected to the peripheral interface that is receiving/supplying the data. In an embodiment, the peripheral interface controller is included in a system on a chip (SOC) that also includes a memory controller configured to couple to a memory. The memory may be mounted on the SOC in a chip-on-chip or package-on-package configuration. The unencrypted data may be stored in the memory for use by other parts of the SOC (e.g. processors, on-chip peripherals, etc.). The keys used for the encryption/decryption of data may remain within the SOC.

Abstract translation: 在一个实施例中，外围接口控制器可以包括内联密码引擎，其可以对通过外围接口发送的数据进行加密，并解密从外围接口接收的数据。 加密可能对连接到正在接收/提供数据的外设接口的设备是透明的。 在一个实施例中，外围接口控制器包括在芯片上的系统（SOC）中，该系统还包括被配置为耦合到存储器的存储器控​​制器。 存储器可以以片上芯片或封装的封装形式安装在SOC上。 未加密的数据可以存储在存储器中以供SOC的其他部分使用（例如处理器，片上外设等）。 用于加密/解密数据的密钥可能保留在SOC内。

公开(公告)号：US20130080660A1

公开(公告)日：2013-03-28

申请号：US13672989

申请日：2012-11-09

Applicant: Apple Inc.

Inventor： Douglas C. Lee ,  Diarmuid P. Ross ,  Tahoma M. Toelkes

IPC: G06F3/00

CPC classification number: G06F13/1642 ,  G06F13/126 ,  Y02D10/14

Abstract: In an embodiment, a peripheral component configured to control an external interface of an integrated circuit. For example, the peripheral component may be a memory interface unit such as a flash memory interface unit. The internal interface to the peripheral component may be shared between data transfers to/from the external interface and control communications to the peripheral component. The peripheral component may include a command queue configured to store a set of commands to perform a transfer on the interface. A control circuit may be coupled to the command queue and may read the commands and communicate with an interface controller to cause a transfer on the interface responsive to the commands. In an embodiment, a macro memory may store command sequences to be performed in response to a macro command in the command queue. In an embodiment, an operand queue may store operand data for use by the commands.

Abstract translation: 在一个实施例中，外围组件被配置为控制集成电路的外部接口。 例如，外围组件可以是诸如闪存接口单元的存储器接口单元。 外围组件的内部接口可以在到/从外部接口的数据传输之间共享，并控制与外设组件的通信。 外围组件可以包括命令队列，被配置为存储一组命令以在接口上执行传送。 控制电路可以耦合到命令队列，并且可以读取命令并与接口控制器进行通信，以响应于命令在接口上进行传送。 在一个实施例中，宏存储器可以存储响应于命令队列中的宏命令而执行的命令序列。 在一个实施例中，操作数队列可以存储操作数数据以供命令使用。

公开(公告)号：US20150046702A1

公开(公告)日：2015-02-12

申请号：US13963457

申请日：2013-08-09

Applicant: Apple Inc.

Inventor： Timothy R. Paaske ,  David S. Warren ,  Michael J. Smith ,  Diarmuid P. Ross ,  Weihua Mao

IPC: G06F12/14 ,  H04L9/12

CPC classification number: G06F12/1408 ,  G06F21/602 ,  G06F21/72 ,  G06F21/85 ,  G06F21/87 ,  G09C1/00 ,  H04L9/12 ,  H04L2209/12

Abstract: In an embodiment, a peripheral interface controller may include an inline cryptographic engine which may encrypt data being sent over a peripheral interface and decrypt data received from the peripheral interface. The encryption may be transparent to the device connected to the peripheral interface that is receiving/supplying the data. In an embodiment, the peripheral interface controller is included in a system on a chip (SOC) that also includes a memory controller configured to couple to a memory. The memory may be mounted on the SOC in a chip-on-chip or package-on-package configuration. The unencrypted data may be stored in the memory for use by other parts of the SOC (e.g. processors, on-chip peripherals, etc.). The keys used for the encryption/decryption of data may remain within the SOC.

Abstract translation: 在一个实施例中，外围接口控制器可以包括内联密码引擎，其可以对通过外围接口发送的数据进行加密，并解密从外围接口接收的数据。 加密可能对连接到正在接收/提供数据的外设接口的设备是透明的。 在一个实施例中，外围接口控制器包括在芯片上的系统（SOC）中，该系统还包括被配置为耦合到存储器的存储器控​​制器。 存储器可以以片上芯片或封装的封装形式安装在SOC上。 未加密的数据可以存储在存储器中以供SOC的其他部分使用（例如处理器，片上外设等）。 用于加密/解密数据的密钥可能保留在SOC内。

公开(公告)号：US08396994B1

公开(公告)日：2013-03-12

申请号：US13672989

申请日：2012-11-09

Applicant: Apple Inc.

Inventor： Douglas C. Lee ,  Diarmuid P. Ross ,  Tahoma M. Toelkes

IPC: G06F3/00 ,  G06F13/00

CPC classification number: G06F13/1642 ,  G06F13/126 ,  Y02D10/14

Abstract: In an embodiment, a peripheral component configured to control an external interface of an integrated circuit. For example, the peripheral component may be a memory interface unit such as a flash memory interface unit. The internal interface to the peripheral component may be shared between data transfers to/from the external interface and control communications to the peripheral component. The peripheral component may include a command queue configured to store a set of commands to perform a transfer on the interface. A control circuit may be coupled to the command queue and may read the commands and communicate with an interface controller to cause a transfer on the interface responsive to the commands. In an embodiment, a macro memory may store command sequences to be performed in response to a macro command in the command queue. In an embodiment, an operand queue may store operand data for use by the commands.

Abstract translation: 在一个实施例中，外围组件被配置为控制集成电路的外部接口。 例如，外围组件可以是诸如闪存接口单元的存储器接口单元。 外围组件的内部接口可以在到/从外部接口的数据传输之间共享，并控制与外设组件的通信。 外围组件可以包括命令队列，被配置为存储一组命令以在接口上执行传送。 控制电路可以耦合到命令队列，并且可以读取命令并与接口控制器进行通信，以响应于命令在接口上进行传送。 在一个实施例中，宏存储器可以存储响应于命令队列中的宏命令而执行的命令序列。 在一个实施例中，操作数队列可以存储操作数数据以供命令使用。