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公开(公告)号:US11352252B2
公开(公告)日:2022-06-07
申请号:US16448901
申请日:2019-06-21
发明人: Ki Yeul Yang , Kyung Han Ryu , Seok Hun Yun , Bora Baloglu , Hyun Cho , Ramakanth Alapati
摘要: In one example, an electronic device includes a semiconductor sensor device having a cavity extending partially inward from one surface to provide a diaphragm adjacent an opposite surface. A barrier is disposed adjacent to the one surface and extends across the cavity, the barrier has membrane with a barrier body and first barrier strands bounded by the barrier body to define first through-holes. The electronic device further comprises one or more of a protrusion pattern disposed adjacent to the barrier structure, which can include a plurality of protrusion portions separated by a plurality of recess portions; one or more conformal membrane layers disposed over the first barrier strands; or second barrier strands disposed on and at least partially overlapping the first barrier strands. The second barrier strands define second through-holes laterally offset from the first through-holes. Other examples and related methods are also disclosed herein.
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公开(公告)号:US10388619B2
公开(公告)日:2019-08-20
申请号:US14835923
申请日:2015-08-26
发明人: Sung Woong Hong , Jun Park , Kyung Han Ryu
摘要: A semiconductor device and a manufacturing method thereof, which can reduce a size of the semiconductor device. As a non-limiting example, various aspects of this disclosure provide for a reduction in package size based at least in part on patterning techniques for forming interconnection structures.
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公开(公告)号:US20170200782A1
公开(公告)日:2017-07-13
申请号:US15149054
申请日:2016-05-06
发明人: Han Min Lee , Pan Ju Choi , Kwang Sun Oh , Sung Man Hong , Sung Woong Hong , Kyung Han Ryu
IPC分类号: H01L49/02 , H01L21/3205 , H01L21/02
CPC分类号: H01L28/75 , H01L21/02271 , H01L21/32051
摘要: Provided are a capacitor of a semiconductor integrated circuit and a method for manufacturing the same, for example a metal-insulator-metal (MIM) type capacitor of a semiconductor integrated circuit, which is capable of improving adhesive force between an electrode layer and a dielectric layer of a capacitor, and a method for manufacturing the same. For example, the present disclosure provides a capacitor for a semiconductor integrated circuit having a new structure, which is capable of preventing a delamination phenomenon on an interface between a lower electrode layer and a dielectric layer by further forming a buffer layer, which is capable of decreasing or compensating for a difference in a coefficient of thermal expansion, between a metal electrode layer and a dielectric layer, particularly, between the lower electrode layer and the dielectric layer, and a method for manufacturing the same.
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公开(公告)号:US20160133591A1
公开(公告)日:2016-05-12
申请号:US14835923
申请日:2015-08-26
发明人: Sung Woong Hong , Jun Park , Kyung Han Ryu
CPC分类号: H01L24/11 , H01L21/565 , H01L21/78 , H01L23/3192 , H01L23/544 , H01L24/03 , H01L24/13 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2224/02375 , H01L2224/113 , H01L2224/1148 , H01L2224/13022 , H01L2224/13024 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/14135 , H01L2224/94 , H01L2924/00014 , H01L2924/01082 , H01L2224/03 , H01L2224/11
摘要: A semiconductor device and a manufacturing method thereof, which can reduce a size of the semiconductor device. As a non-limiting example, various aspects of this disclosure provide for a reduction in package size based at least in part on patterning techniques for forming interconnection structures.
摘要翻译: 一种半导体器件及其制造方法,其可以减小半导体器件的尺寸。 作为非限制性示例,本公开的各个方面提供了至少部分地基于用于形成互连结构的图案化技术来减小封装尺寸。
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