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公开(公告)号:US20240321702A1
公开(公告)日:2024-09-26
申请号:US18474166
申请日:2023-09-25
Applicant: Advanced Micro Devices, Inc. , Xilinx, Inc.
Inventor: Yan Wang , Kevin Gillespie , Samuel Naffziger , Richard Schultz , Raja Swaminathan , Omar Zia , John Wuu
IPC: H01L23/498 , H01L23/00 , H01L23/367 , H01L25/065
CPC classification number: H01L23/49822 , H01L23/3675 , H01L23/49816 , H01L24/05 , H01L24/32 , H01L25/0652 , H01L2224/05009 , H01L2224/05025 , H01L2224/32146 , H01L2224/32165 , H01L2924/1431 , H01L2924/1437 , H01L2924/351
Abstract: A method for providing backside power can include providing a first circuit die having a first metal stack. The method can also include connecting a second metal stack of a second circuit die to the first metal stack of the first circuit die, wherein a backside power delivery network is located in a passivation layer of at least one of the first circuit die or the second circuit die. Various other methods, systems, and computer-readable media are also disclosed.
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公开(公告)号:US20240321827A1
公开(公告)日:2024-09-26
申请号:US18474158
申请日:2023-09-25
Applicant: Advanced Micro Devices, Inc. , Xilinx, Inc.
Inventor: Omar Zia , Thomas D Burd , Kevin Gillespie , Samuel Naffziger , Richard Schultz , Raja Swaminathan , Srividhya Venkataraman , Yan Wang , John Wuu
IPC: H01L25/065 , H01L23/00 , H01L23/36 , H01L23/48 , H10B80/00
CPC classification number: H01L25/0657 , H01L23/36 , H01L23/481 , H01L24/08 , H01L24/16 , H01L24/80 , H10B80/00 , H01L2224/08145 , H01L2224/16145 , H01L2224/80895 , H01L2224/80896
Abstract: A method for circuit die stacking can include providing a first circuit die having a first metal stack, wherein the first circuit die corresponds to a primary thermal source of an integrated circuit including the first circuit die. The method can additionally include providing a second circuit die of the integrated circuit, wherein the second circuit die has a second metal stack and is configured for connection to at least one of a package substrate or an additional die. The method can also include connecting the first metal stack to the second metal stack. Various other methods, systems, and computer-readable media are also disclosed.
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公开(公告)号:US20240321706A1
公开(公告)日:2024-09-26
申请号:US18474151
申请日:2023-09-25
Applicant: Advanced Micro Devices, Inc.
Inventor: William George En , Samuel Naffziger , Regina T. Schmidt , Omar Zia , John Wuu
IPC: H01L23/498 , H01L23/48 , H01L25/065
CPC classification number: H01L23/49827 , H01L23/481 , H01L23/49816 , H01L25/0657 , H01L2225/06541
Abstract: A method for implementing shared metal connectivity between 3D stacked circuit dies can include providing a first circuit die having a first metal stack. The method can additionally include providing a second circuit die having a second metal stack, wherein at least one metal layer of the second metal stack is utilized by both the first circuit die and the second circuit die. The method can also include connecting the second metal stack to the first metal stack of the first circuit die. Various other methods, systems, and computer-readable media are also disclosed.
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公开(公告)号:US20240324248A1
公开(公告)日:2024-09-26
申请号:US18474179
申请日:2023-09-25
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor: John Wuu , Kevin Gillespie , Samuel Naffziger , Spence Oliver , Rajit Seahra , Regina T. Schmidt , Raja Swaminathan , Omar Zia
IPC: H10B80/00 , H01L23/544 , H01L25/00 , H01L25/18
CPC classification number: H10B80/00 , H01L23/544 , H01L25/18 , H01L25/50 , H01L23/481 , H01L23/5286 , H01L24/06 , H01L24/08 , H01L2223/54433 , H01L2224/06181 , H01L2224/08145
Abstract: A method for die pair partitioning can include providing a circuit die. The method can additionally include providing one or more additional circuit die having one or more fuses positioned therein, wherein the one or more fuses identify the circuit die. The method can also include connecting the one or more additional circuit die to the circuit die. Various other methods, systems, and computer-readable media are also disclosed.
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