公开(公告)号：US20240324248A1

公开(公告)日：2024-09-26

申请号：US18474179

申请日：2023-09-25

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： John Wuu ,  Kevin Gillespie ,  Samuel Naffziger ,  Spence Oliver ,  Rajit Seahra ,  Regina T. Schmidt ,  Raja Swaminathan ,  Omar Zia

IPC: H10B80/00 ,  H01L23/544 ,  H01L25/00 ,  H01L25/18

CPC classification number: H10B80/00 ,  H01L23/544 ,  H01L25/18 ,  H01L25/50 ,  H01L23/481 ,  H01L23/5286 ,  H01L24/06 ,  H01L24/08 ,  H01L2223/54433 ,  H01L2224/06181 ,  H01L2224/08145

Abstract: A method for die pair partitioning can include providing a circuit die. The method can additionally include providing one or more additional circuit die having one or more fuses positioned therein, wherein the one or more fuses identify the circuit die. The method can also include connecting the one or more additional circuit die to the circuit die. Various other methods, systems, and computer-readable media are also disclosed.

公开(公告)号：US20190004588A1

公开(公告)日：2019-01-03

申请号：US15639992

申请日：2017-06-30

Applicant: ATI Technologies ULC

Inventor： Elsie Lo ,  Erhan Ergin ,  Dipanjan Sengupta ,  Rajit Seahra ,  Sowmya Thikkavarapu ,  Kameswara Goutham Vankayalapati

IPC: G06F1/32

CPC classification number: G06F17/5081 ,  G06F1/3243 ,  G06F1/3296 ,  G06F2217/78

Abstract: A non-transitory computer-readable medium includes instructions that, when provided to and executed by a processor, cause the processor to receive a first placement of domain instances of an integrated circuit layout provided as a tile having a group of multiple power domain modules. The first placement of domain instances is scanned to identify instances associated with a preselected power specification. A heuristic is applied to the first placement of domain instances to form an observation area. the heuristic demarcates select instances to form the observation area. Each instance associated with the preselected power specification is identified in the observation area. A contiguous region of instances is formed from the select instances in the observation area. The first placement of domain instances in the integrated circuit layout is modified to provided revised placement for instances associated with the contiguous region of instances.

公开(公告)号：US10515182B2

公开(公告)日：2019-12-24

申请号：US15639992

申请日：2017-06-30

Applicant: ATI Technologies ULC

Inventor： Elsie Lo ,  Erhan Ergin ,  Dipanjan Sengupta ,  Rajit Seahra ,  Sowmya Thikkavarapu ,  Kameswara Goutham Vankayalapati

IPC: G06F17/50 ,  G06F1/3296 ,  G06F1/3234

Abstract: A non-transitory computer-readable medium includes instructions that, when provided to and executed by a processor, cause the processor to receive a first placement of domain instances of an integrated circuit layout provided as a tile having a group of multiple power domain modules. The first placement of domain instances is scanned to identify instances associated with a preselected power specification. A heuristic is applied to the first placement of domain instances to form an observation area. The heuristic demarcates select instances to form the observation area. Each instance associated with the preselected power specification is identified in the observation area. A contiguous region of instances is formed from the select instances in the observation area. The first placement of domain instances in the integrated circuit layout is modified to provided revised placement for instances associated with the contiguous region of instances.