公开(公告)号：US20150067266A1

公开(公告)日：2015-03-05

申请号：US14011616

申请日：2013-08-27

Applicant: Advanced Micro Devices, Inc

Inventor： Syed Ali Jafri ,  Yasuko Eckert ,  Srilatha Manne

IPC: G06F12/12

CPC classification number: G06F12/127 ,  G06F12/0804 ,  G06F12/123 ,  Y02D10/13

Abstract: A level of cache memory receives modified data from a higher level of cache memory. A set of cache lines with an index associated with the modified data is identified. The modified data is stored in the set in a cache line with an eviction priority that is at least as high as an eviction priority, before the modified data is stored, of an unmodified cache line with a highest eviction priority among unmodified cache lines in the set.

Abstract translation: 一级高速缓冲存储器从更高级别的缓存存储器接收修改的数据。 识别具有与修改的数据相关联的索引的一组高速缓存行。 修改后的数据被存储在高速缓存行中，其具有在修改数据被存储之前至少与驱逐优先级一样高的驱逐优先级，该缓存优先级在未修改的高速缓存行中具有最高驱逐优先级的未修改高速缓存行 组。

公开(公告)号：US09710392B2

公开(公告)日：2017-07-18

申请号：US14460550

申请日：2014-08-15

Applicant: Advanced Micro Devices, Inc.

Inventor： Syed Ali Jafri ,  Yasuko Eckert ,  Srilatha Manne ,  Mithuna S Thottethodi

IPC: G06F12/10 ,  G06F12/1009

CPC classification number: G06F12/1009 ,  G06F2212/1024 ,  G06F2212/654 ,  G06F2212/655 ,  G06F2212/656

Abstract: Embodiments are described for methods and systems for mapping virtual memory pages to physical memory pages by analyzing a sequence of memory-bound accesses to the virtual memory pages, determining a degree of contiguity between the accessed virtual memory pages, and mapping sets of the accessed virtual memory pages to respective single physical memory pages. Embodiments are also described for a method for increasing locality of memory accesses to DRAM in virtual memory systems by analyzing a pattern of virtual memory accesses to identify contiguity of accessed virtual memory pages, predicting contiguity of the accessed virtual memory pages based on the pattern, and mapping the identified and predicted contiguous virtual memory pages to respective single physical memory pages.

公开(公告)号：US20150067264A1

公开(公告)日：2015-03-05

申请号：US14012475

申请日：2013-08-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Yasuko Eckert ,  Syed Ali Jafri ,  Srilatha Manne ,  Gabriel Loh

IPC: G06F12/08

CPC classification number: G06F12/126 ,  Y02D10/13

Abstract: In some embodiments, a method of managing cache memory includes identifying a group of cache lines in a cache memory, based on a correlation between the cache lines. The method also includes tracking evictions of cache lines in the group from the cache memory and, in response to a determination that a criterion regarding eviction of cache lines in the group from the cache memory is satisfied, selecting one or more (e.g., all) remaining cache lines in the group for eviction.

Abstract translation: 在一些实施例中，管理高速缓存存储器的方法包括基于高速缓存行之间的相关性来识别高速缓存存储器中的一组高速缓存行。 该方法还包括跟踪来自高速缓存存储器的组中的高速缓存行的移除，并且响应于确定与高速缓冲存储器中的组中的高速缓存行的逐出的标准被选择一个或多个（例如全部） 组中的剩余高速缓存行被驱逐。

公开(公告)号：US10133678B2

公开(公告)日：2018-11-20

申请号：US14012475

申请日：2013-08-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Yasuko Eckert ,  Syed Ali Jafri ,  Srilatha Manne ,  Gabriel Loh

IPC: G06F12/00 ,  G06F12/126

Abstract: In some embodiments, a method of managing cache memory includes identifying a group of cache lines in a cache memory, based on a correlation between the cache lines. The method also includes tracking evictions of cache lines in the group from the cache memory and, in response to a determination that a criterion regarding eviction of cache lines in the group from the cache memory is satisfied, selecting one or more (e.g., all) remaining cache lines in the group for eviction.

公开(公告)号：US09378153B2

公开(公告)日：2016-06-28

申请号：US14011616

申请日：2013-08-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Syed Ali Jafri ,  Yasuko Eckert ,  Srilatha Manne

IPC: G06F12/12 ,  G06F12/08

CPC classification number: G06F12/127 ,  G06F12/0804 ,  G06F12/123 ,  Y02D10/13

Abstract: A level of cache memory receives modified data from a higher level of cache memory. A set of cache lines with an index associated with the modified data is identified. The modified data is stored in the set in a cache line with an eviction priority that is at least as high as an eviction priority, before the modified data is stored, of an unmodified cache line with a highest eviction priority among unmodified cache lines in the set.

Abstract translation: 一级高速缓冲存储器从更高级别的缓存存储器接收修改的数据。 识别具有与修改的数据相关联的索引的一组高速缓存行。 修改后的数据被存储在高速缓存行中，其具有在修改数据被存储之前至少与驱逐优先级一样高的驱逐优先级，该缓存优先级在未修改的高速缓存行中具有最高驱逐优先级的未修改高速缓存行 组。

公开(公告)号：US20160049181A1

公开(公告)日：2016-02-18

申请号：US14460550

申请日：2014-08-15

Applicant: Advanced Micro Devices, Inc.

Inventor： Syed Ali Jafri ,  Yasuko Eckert ,  Srilatha Manne ,  Mithuna S. Thottethodi

IPC: G11C7/10 ,  G06F12/10 ,  G11C11/406

CPC classification number: G06F12/1009 ,  G06F2212/1024 ,  G06F2212/654 ,  G06F2212/655 ,  G06F2212/656

Abstract: Embodiments are described for methods and systems for mapping virtual memory pages to physical memory pages by analyzing a sequence of memory-bound accesses to the virtual memory pages, determining a degree of contiguity between the accessed virtual memory pages, and mapping sets of the accessed virtual memory pages to respective single physical memory pages. Embodiments are also described for a method for increasing locality of memory accesses to DRAM in virtual memory systems by analyzing a pattern of virtual memory accesses to identify contiguity of accessed virtual memory pages, predicting contiguity of the accessed virtual memory pages based on the pattern, and mapping the identified and predicted contiguous virtual memory pages to respective single physical memory pages.

Abstract translation: 描述了通过分析对虚拟存储器页面的存储器绑定访问的序列，确定所访问的虚拟存储器页面之间的连续程度以及访问的虚拟存储器页面的映射集合来将虚拟存储器页面映射到物理存储器页面的方法和系统的实施例 存储页面到相应的单个物理存储器页面。 还描述了用于通过分析虚拟存储器访问的模式以识别所访问的虚拟存储器页的邻接性，基于该模式来预测所访问的虚拟存储器页的邻接性的方法来增加虚拟存储器系统中对DRAM的存储器访问的局部性的方法，以及 将所识别的和预测的连续虚拟存储器页面映射到相应的单个物理存储器页面。