公开(公告)号：US20250098184A1

公开(公告)日：2025-03-20

申请号：US18470582

申请日：2023-09-20

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Arsalan Alam ,  Anadi Srivastava ,  Rajen Singh Sidhu ,  Alexander Helmut Pfeiffenberger ,  Liwei Wang

IPC: H01L23/522 ,  H01L23/64

Abstract: A method for increasing capacitance density within an integrated passive device can include forming a first trench capacitor within a substrate, forming a second trench capacitor within an insulating layer overlying the substrate, and connecting the first and second trench capacitors through connection vias that extend through the insulating layer to form an integrated passive device (IPD) capacitor. A high capacitance density device can include a stacked and co-integrated architecture of two or more tiers of trench capacitors.

公开(公告)号：US20230197623A1

公开(公告)日：2023-06-22

申请号：US17645104

申请日：2021-12-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Arsalan Alam ,  Raja Swaminathan ,  Rahul Agarwal

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/5384 ,  H01L24/14 ,  H01L23/49811 ,  H01L23/5385 ,  H01L23/5386

Abstract: An electronic device includes a first integrated circuit die, a support structure, and a second integrated circuit die and may include a spacer. The support structure includes a circuit element. The support structure has a thickness of at least 110 microns. The spacer or second integrated circuit die includes a conductor. The spacer or second integrated circuit die is disposed between the first integrated circuit die and the support structure. The conductor is electrically coupled to the integrated circuit die or the circuit element of the support structure. The electronic device provides more flexibility to a designer by allowing a circuit element or circuit that occupies a significant area to be in the support structure.

公开(公告)号：US20250096161A1

公开(公告)日：2025-03-20

申请号：US18470559

申请日：2023-09-20

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Arsalan Alam ,  Anadi Srivastava ,  Rajen Singh Sidhu ,  Alexander Helmut Pfeiffenberger ,  Liwei Wang

IPC: H01L23/64 ,  H01L23/522

Abstract: A method for increasing capacitance density within an integrated passive device can include forming a first trench capacitor within a first insulating layer overlying a substrate, forming a second trench capacitor within a second insulating layer overlying the first insulating layer, and connecting the first and second trench capacitors through connection vias that extend through the second insulating layer to form an integrated passive device (IPD) capacitor. A high capacitance density device can include a stacked and co-integrated architecture of two or more such layers.

公开(公告)号：US20240047228A1

公开(公告)日：2024-02-08

申请号：US17816944

申请日：2022-08-02

Applicant: Advanced Micro Devices, Inc.

Inventor： Sri Ranga Sai Boyapati ,  Deepak Vasant Kulkarni ,  Raja Swaminathan ,  Brett P. Wilkerson ,  Arsalan Alam

IPC: H01L21/48 ,  H01L23/64 ,  H01L23/498

CPC classification number: H01L21/486 ,  H01L21/4857 ,  H01L23/642 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894

Abstract: A disclosed method can include (i) positioning a first surface of a component of a semiconductor device on a first plated through-hole, (ii) covering, with a layer of dielectric material, at least a second surface of the component that is opposite the first surface of the component, (iii) removing a portion of the layer of dielectric material covering the second surface of the component to form at least one cavity, and (iv) depositing conductive material in the cavity to form a second plated through-hole on the second surface of the component. Various other apparatuses, systems, and methods are also disclosed.