公开(公告)号：US08311083B2

公开(公告)日：2012-11-13

申请号：US12648898

申请日：2009-12-29

申请人： Lei Ding ,  Zigang Yang ,  Fernando Mujica ,  Roland Sperlich

发明人： Lei Ding ,  Zigang Yang ,  Fernando Mujica ,  Roland Sperlich

IPC分类号： H04L5/16

CPC分类号： H04B1/40 ,  H03D3/009

摘要： Conventional transceivers do provide some compensation for in-phase/quadrature (I/Q) imbalance. However, these techniques do not separately compensate for I/Q imbalance for the transmitter and receiver sides of the transceiver. Here, a transceiver is provided that allows for compensation of I/Q imbalance in the transmitter and receiver irrespective of the other to allow for a more accurate transceiver.

摘要翻译： 传统的收发器确实为同相/正交（I / Q）不平衡提供了一些补偿。 然而，这些技术不会单独地补偿收发器的发射机和接收机侧的I / Q不平衡。 这里，提供了一种收发器，其允许补偿发射机和接收机中的I / Q不平衡，而不管另一个是允许更准确的收发机。

公开(公告)号：US08306149B2

公开(公告)日：2012-11-06

申请号：US12571435

申请日：2009-10-01

申请人： Fernando Alberto Mujica ,  Hardik Prakash Gandhi ,  Lei Ding ,  Milind Borkar ,  Zigang Yang ,  Roland Sperlich ,  Lars Morten Jorgensen ,  William L. Abbott

发明人： Fernando Alberto Mujica ,  Hardik Prakash Gandhi ,  Lei Ding ,  Milind Borkar ,  Zigang Yang ,  Roland Sperlich ,  Lars Morten Jorgensen ,  William L. Abbott

IPC分类号： H04L25/03 ,  H04L25/49

CPC分类号： H03F1/3258 ,  H03F1/3247 ,  H03F1/3294 ,  H03F3/195 ,  H03F3/24 ,  H03F2200/336 ,  H04L27/368

摘要： An apparatus is provided. In the apparatus, an input to index (I2I) module maps a complex input into a real signal. A real data tap delay line is coupled to the I2I module and includes N delay-elements. A complex data tap delay line is configured to receive the complex input and includes M delay elements. A set of K of non-linear function modules is also provided. Each non-linear function module from the set has at least one real input, at least one complex input, and at least one complex output. A configurable connectivity crossbar multiplexer couples K of the N real tap delay line elements to real inputs of the set non-linear functions and couples K of the M complex tap delay line elements to complex inputs of the set non-linear function modules.

摘要翻译： 提供了一种装置。 在该装置中，索引（I2I）模块的输入将复数输入映射到实际信号中。 实际数据抽头延迟线耦合到I2I模块并且包括N个延迟元件。 复数据抽头延迟线被配置为接收复合输入并且包括M个延迟元件。 还提供了一组K个非线性功能模块。 来自该组的每个非线性功能模块具有至少一个实际输入，至少一个复合输入和至少一个复合输出。 可配置连接交叉开关多路复用器将N个实际分接延迟线路元件的K耦合到所设置的非线性函数的实际输入端，并将M个复杂抽头延迟线路元件的K耦合到该组非线性功能模块的复合输入端。

公开(公告)号：US20120250790A1

公开(公告)日：2012-10-04

申请号：US13078363

申请日：2011-04-01

申请人： Zigang Yang ,  Lars Jorgensen ,  Lei Ding

发明人： Zigang Yang ,  Lars Jorgensen ,  Lei Ding

IPC分类号： H04L25/49

CPC分类号： H04L27/368 ,  H03C2200/0016 ,  H03F1/3247 ,  H03F1/3294 ,  H03F3/189 ,  H03F3/24 ,  H03F2200/336 ,  H04L27/364

摘要： In conventional radio frequency (RF) systems, transmitters will usually convert baseband signals to RF so as to be transmitted. As part of the conversion process, the transmitters will perform digital preditortion (DPD), which uses feedback from a power amplifier. However, there are usually mismatches between the in-phase (I) and quadrature (Q) paths within with feedback loop. Traditional IQ correction filters were ineffective at providing adequate compensation for these mismatches, but here a filter is provided that provides adequate out-of-band compensation by use of frequency selectivity.

摘要翻译： 在常规射频（RF）系统中，发射机通常将基带信号转换成RF以便被发送。 作为转换过程的一部分，发射机将执行使用功率放大器反馈的数字预处理（DPD）。 然而，通过反馈回路中的同相（I）和正交（Q）路径之间通常存在不匹配。 传统的IQ校正滤波器在为这些不匹配提供足够的补偿方面无效，但是提供了一种通过使用频率选择性提供足够的带外补偿的滤波器。

公开(公告)号：US08351542B2

公开(公告)日：2013-01-08

申请号：US12414000

申请日：2009-03-30

申请人： Zigang Yang ,  Fernando A. Mujica ,  Gregory Copeland ,  Murtaza Ali

发明人： Zigang Yang ,  Fernando A. Mujica ,  Gregory Copeland ,  Murtaza Ali

IPC分类号： H04L25/03

CPC分类号： H04L25/49

摘要： An apparatus and system are provided for crest factor reduction (CFR). Preferably, a peak from the wideband signal is detected. A gain from the magnitude of the peak and a threshold can then be calculated. Based on this information, each carrier's contribution to the peak can be approximated, and a cancellation pulse coefficient for each carrier from its contribution to the peak can be calculated. A base cancellation pulse can be calculated from the cancellation pulse coefficients for each carrier, and a cancellation pulse can be calculated from the base cancellation pulse and the gain, which can then be applied to the wideband signal.

摘要翻译： 提供了用于波峰因数降低（CFR）的装置和系统。 优选地，检测来自宽带信号的峰值。 然后可以计算从峰值的幅度和阈值的增益。 基于该信息，可以近似每个载波对峰值的贡献，并且可以计算每个载波对峰值的贡献的抵消脉冲系数。 可以根据每个载波的消除脉冲系数来计算基本消除脉冲，并且可以从基本消除脉冲和增益计算抵消脉冲，然后可以将其提供给宽带信号。

公开(公告)号：US20110080216A1

公开(公告)日：2011-04-07

申请号：US12571435

申请日：2009-10-01

申请人： FERNANDO ALBERTO MUJICA ,  HARDIK PRAKASH GANDHI ,  LEI DING ,  MILIND BORKAR ,  ZIGANG YANG ,  ROLAND SPERLICH ,  LARS MORTEN JORGENSEN ,  WILLIAM L. ABBOTT

发明人： FERNANDO ALBERTO MUJICA ,  HARDIK PRAKASH GANDHI ,  LEI DING ,  MILIND BORKAR ,  ZIGANG YANG ,  ROLAND SPERLICH ,  LARS MORTEN JORGENSEN ,  WILLIAM L. ABBOTT

IPC分类号： H03F1/26

CPC分类号： H03F1/3258 ,  H03F1/3247 ,  H03F1/3294 ,  H03F3/195 ,  H03F3/24 ,  H03F2200/336 ,  H04L27/368

摘要： Systems and methods for power amplifier pre-distortion are provided. The systems and methods of power amplifier digital pre-distortion disclosed herein may include a generic pre-distorter architecture which can implement a variety of Volterra cross terms involving single dimension convolutions (first order dynamics). For hardware implementations, this generic pre-distorter is further fine-tuned to provide a choice between different sets of cross terms that can be selected for a given PA for optimal performance. The novel pre-distorter architecture provides flexibility to trade off memory depth for additional Volterra terms and vice versa. A further novelty is the ability to trade off both memory depth and cross terms for a higher sample rate operation, which may enable higher order non-linear pre-distortion, or support for higher signal bandwidths. A poly-phase non-linear filtering mode allows for this flexibility.

摘要翻译： 提供了功率放大器预失真的系统和方法。 本文公开的功率放大器数字预失真的系统和方法可以包括通用预失真器架构，其可以实现涉及单维卷积（一阶动力学）的各种Volterra交叉项。 对于硬件实现，该通用预失真器进一步被微调，以提供可以为给定PA选择的不同交叉项集之间的选择，以获得最佳性能。 该新颖的预失真器架构提供了灵活性，以便与额外的Volterra术语交换记忆深度，反之亦然。 更进一步的新颖性是能够对较高的采样率操作进行存储深度和交叉项的权衡，这可以实现更高阶的非线性预失真或支持更高的信号带宽。 多相非线性滤波模式允许这种灵活性。

公开(公告)号：US20060062289A1

公开(公告)日：2006-03-23

申请号：US11233452

申请日：2005-09-22

申请人： Channamallesh Hiremath ,  Udayan Dasgupta ,  Zigang Yang ,  Umashanker Iyer ,  Michael Locke

发明人： Channamallesh Hiremath ,  Udayan Dasgupta ,  Zigang Yang ,  Umashanker Iyer ,  Michael Locke

IPC分类号： H04L5/16 ,  H04K1/10

CPC分类号： H04L5/006 ,  H04L1/0071 ,  H04L1/04 ,  H04L5/0007 ,  H04L5/0044 ,  H04L27/2647

摘要： A system and method for reordering tones of a DMT signal within a communication system is described. Cross tone correlated noise in a received signal is identified and rearranged such that tones with correlated noise are spread out throughout the received signal before being processed by a decoder such as, Viterbi decoder. In an embodiment, two tones with the most correlated noise are placed at each end of the sequence of tones presented to the Viterbi decoder. In some embodiment, the tones with correlated noise can be spread such that two adjacent tones with correlated noise have a minimum distance of at least three tones between them at the input to the Viterbi decoder. In other embodiment, tones in the received signal can be processed in various kinds of interleavers for reordering according to the interleaver scheme.

摘要翻译： 描述了用于在通信系统内重新排序DMT信号的音调的系统和方法。 识别和重新排列接收信号中的交叉音相关噪声，使得具有相关噪声的音调在由诸如维特比解码器之类的解码器处理之前，在整个接收信号中被扩展。 在一个实施例中，具有最相关噪声的两个音调被放置在呈现给维特比解码器的音调序列的每一端。 在一些实施例中，可以扩展具有相关噪声的音调，使得具有相关噪声的两个相邻音调在维特比解码器的输入处具有至少三个音调的最小距离。 在其他实施例中，可以根据交织器方案在各种交织器中处理接收信号中的音调以进行重新排序。

公开(公告)号：US20050026572A1

公开(公告)日：2005-02-03

申请号：US10628160

申请日：2003-07-28

申请人： Udayan Dasgupta ,  Zigang Yang ,  Arthur Refern ,  Murtaza Ali

发明人： Udayan Dasgupta ,  Zigang Yang ,  Arthur Refern ,  Murtaza Ali

IPC分类号： H04L1/20 ,  H04B1/04

CPC分类号： H04L1/20 ,  H04B3/487

摘要： A noise determiner for use with a communications system, a method of determining noise in a communications system and a digital subscriber line (DSL) modem. In one embodiment, the noise determiner includes (1) a crosstalk identifier that detects directly a noise source in a frequency domain from observed noise associated with the communications system and (2) a crosstalk estimator coupled to the crosstalk identifier and that provides a corresponding level of the noise source.

摘要翻译： 用于通信系统的噪声确定器，确定通信系统和数字用户线（DSL）调制解调器中的噪声的方法。 在一个实施例中，噪声确定器包括（1）串扰标识符，其从与通信系统相关联的观察到的噪声直接检测频域中的噪声源，以及（2）耦合到串扰标识符的串扰估计器，并且提供相应级别 的噪声源。

公开(公告)号：US08416893B2

公开(公告)日：2013-04-09

申请号：US12957278

申请日：2010-11-30

申请人： Hardik Prakash Gandhi ,  Zigang Yang

发明人： Hardik Prakash Gandhi ,  Zigang Yang

IPC分类号： H04L27/08

CPC分类号： H04L27/2623 ,  H03G3/3042 ,  H03G7/007 ,  H04L27/08 ,  H04L27/3411

摘要： Crest factor reduction algorithms described herein may be used to improve power amplifier efficiency during low signal power conditions compared to traditional static threshold techniques. Techniques described herein insure that the signal power level at the output of the crest fact reduction block is held constant relative to the input power level under all signal power level conditions. Two different solutions may be implemented together or separately to achieve the desired conditions. The first technique provides constant ratio between input power and output power. Constant ratio of peak and average output levels keeps the amount of crest factor reduction applied to the signal constant, irrespective of the signal power level. A second technique is to hold signal power level constant in respect to the amount of crest factor reduction applied.

摘要翻译： 与传统的静态阈值技术相比，本文描述的波峰因数降低算法可用于在低信号功率条件下提高功率放大器效率。 这里描述的技术确保峰值事实减少块的输出处的信号功率电平在所有信号功率电平条件下相对于输入功率电平保持恒定。 两个不同的解决方案可以一起实施或单独实现以实现期望的条件。 第一种技术提供输入功率与输出功率之间的恒定比例。 峰值和平均输出电平的恒定比率保持峰值因数降低量应用于信号常数，而与信号功率电平无关。 第二种技术是保持相对于施加的波峰因数降低量的信号功率电平恒定。

公开(公告)号：US20120134399A1

公开(公告)日：2012-05-31

申请号：US12957278

申请日：2010-11-30

申请人： Hardik Prakash Gandhi ,  Zigang Yang

发明人： Hardik Prakash Gandhi ,  Zigang Yang

IPC分类号： H04L27/08 ,  H04B17/00

CPC分类号： H04L27/2623 ,  H03G3/3042 ,  H03G7/007 ,  H04L27/08 ,  H04L27/3411

摘要： Crest factor reduction algorithms described herein may be used to improve power amplifier efficiency during low signal power conditions compared to traditional static threshold techniques. Techniques described herein insure that the signal power level at the output of the crest fact reduction block is held constant relative to the input power level under all signal power level conditions. Two different solutions may be implemented together or separately to achieve the desired conditions. The first technique provides constant ratio between input power and output power. Constant ratio of peak and average output levels keeps the amount of crest factor reduction applied to the signal constant, irrespective of the signal power level. A second technique is to hold signal power level constant in respect to the amount of crest factor reduction applied.

摘要翻译： 与传统的静态阈值技术相比，本文描述的波峰因数降低算法可用于在低信号功率条件下提高功率放大器效率。 这里描述的技术确保峰值事实减少块的输出处的信号功率电平在所有信号功率电平条件下相对于输入功率电平保持恒定。 两个不同的解决方案可以一起实施或单独实现以实现期望的条件。 第一种技术提供输入功率与输出功率之间的恒定比例。 峰值和平均输出电平的恒定比率保持峰值因数降低量应用于信号常数，而与信号功率电平无关。 第二种技术是保持相对于施加的波峰因数降低量的信号功率电平恒定。

公开(公告)号：US07916050B1

公开(公告)日：2011-03-29

申请号：US12580032

申请日：2009-10-15

申请人： Fernando A. Mujica ,  Charles K. Sestok ,  Zigang Yang

发明人： Fernando A. Mujica ,  Charles K. Sestok ,  Zigang Yang

IPC分类号： H03M1/06

CPC分类号： H03M1/004 ,  H03M1/1215 ,  H03M1/123

摘要： Previously, when designing receivers for radio frequency (RF) or wireless communications, designers chose between time-interleaved (TI) analog-to-digital converters (ADCs) for intermediate frequency architectures and dual channel ADCs for direct conversion architectures. Here, similarities between TI ADCs and dual channel ADC were recognized, and an ADC that has the capability of operating as a TI ADCs and dual channel ADC is provided. This allows designer to have greatly increased flexibility during the design process which can greatly reduce design costs, while also allowing the manufacturer of the ADC to realize a reduction in its operating costs.

摘要翻译： 以前，当设计用于射频（RF）或无线通信的接收机时，设计人员选择用于中频架构的时间交织（TI）模数转换器（ADC）和用于直接转换架构的双通道ADC。 在这里，TI ADC和双通道ADC之间的相似之处得到了认可，并且提供了具有作为TI ADC和双通道ADC运作能力的ADC。 这允许设计人员在设计过程中大大提高灵活性，从而大大降低设计成本，同时还允许ADC的制造商实现降低运行成本。