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公开(公告)号：US20210028754A1
公开(公告)日：2021-01-28
申请号：US16521704
申请日：2019-07-25
发明人： Dror Hurwitz , BawChing Perng , Duan Feng
IPC分类号： H03H9/02 , H01L41/09 , H01L41/18 , H01L41/047 , H01L23/538 , H01L23/00 , H03H9/17
摘要： A package for an electronic component wherein the package comprises a front end, a back end, and an active membrane layer sandwiched between front and back electrodes of conducting material; the active membrane being mechanically supported by the front end and covered by a back end comprising at least one back cavity having organic walls and lid, with filled through vias traversing the organic lid and walls for coupling to the electrodes by an internal routing layer; the vias being coupleable by external solderable bumps to a circuit board for coupling the package in a ‘flip chip’ configuration.
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公开(公告)号：US20210028751A1
公开(公告)日：2021-01-28
申请号：US16521727
申请日：2019-07-25
发明人： Dror Hurwitz , BawChing Perng , Duan Feng
IPC分类号： H03H3/02 , H03H9/05 , H03H9/10 , H03H9/17 , H01L41/313 , H01L41/319 , H01L41/332 , H01L41/337 , H01L41/338
摘要： A method for fabricating an array of front ends for an array of packaged electronic components that each comprise:
an electrical element packaged within a package comprising a front part of a package comprising an inner section with a cavity therein opposite the resonator defined by the raised frame and an outer section sealing said cavity; and a back part of the package comprising a back cavity in an inner back section, and an outer back section sealing the cavity, said back package further comprising a first and a second via through the back end around said at least one back cavity for coupling to front and back electrodes of the electronic component; the vias terminating in external contact pads that are coupleable in a ‘flip chip’ configuration to a circuit board; the method comprising the stages of: i. Obtaining a carrier substrate having an active membrane layer attached thereto by its rear surface, with a front electrode on the front surface of the active membrane layer; ii. Obtaining an inner front end section; iii. Attaching the inner front end section to the exposed front surface of the front electrode; iv. Detaching the carrier substrate from the rear surface of the active membrane layer; v. Optionally thinning the inner front section; vi. Processing the rear surface by removing material to create an array of at least one island of active membrane on at least one island of front electrode; vii. Creating an array of at least one front cavity by selectively removing at least outer layer of the inner front end section, such that there is one cavity opposite each island of membrane on the front side of the front electrode on the opposite side to the island of active membrane; viii. Applying an outer front end section to the inner front end section and bonding the outer front end section to an outer surface of the inner front end section such that the outer front end section spans across and seals the at least one cavity of the array of front cavities.-
3.发明申请公开(公告)号：US20190245509A1
公开(公告)日：2019-08-08
申请号：US15888358
申请日：2018-02-05
发明人： Dror Hurwitz
摘要： A method of fabricating an FBAR filter device including an array of resonators, each resonator comprising a single crystal piezoelectric film sandwiched between a first metal electrode and a second metal electrode, wherein the first electrode is supported by a support membrane over an air cavity, the air cavity embedded in a silicon dioxide layer over a silicon handle, with through-silicon via holes through the silicon handle and into the air cavity, the side walls of said air cavity in the silicon dioxide layer being defined by perimeter trenches that are resistant to a silicon oxide etchant.
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公开(公告)号：US11463063B2
公开(公告)日：2022-10-04
申请号：US16521727
申请日：2019-07-25
发明人： Dror Hurwitz , BawChing Perng , Duan Feng
IPC分类号： G11C16/04 , H03H3/02 , H01L41/313 , H01L41/319 , H01L41/332 , H01L41/337 , H01L41/338 , H03H9/05 , H03H9/10 , H03H9/17
摘要： A method for fabricating an array of front ends for an array of packaged electronic components that each comprise:
an electrical element packaged within a package comprising
a front part of a package comprising an inner section with a cavity therein opposite the resonator defined by the raised frame and an outer section sealing said cavity; and
a back part of the package comprising a back cavity in an inner back section, and an outer back section sealing the cavity, said back package further comprising a first and a second via through the back end around said at least one back cavity for coupling to front and back electrodes of the electronic component; the vias terminating in external contact pads that are coupleable in a ‘flip chip’ configuration to a circuit board; the method comprising the stages of: i. Obtaining a carrier substrate having an active membrane layer attached thereto by its rear surface, with a front electrode on the front surface of the active membrane layer; ii. Obtaining an inner front end section; iii. Attaching the inner front end section to the exposed front surface of the front electrode; iv. Detaching the carrier substrate from the rear surface of the active membrane layer; v. Optionally thinning the inner front section; vi. Processing the rear surface by removing material to create an array of at least one island of active membrane on at least one island of front electrode; vii. Creating an array of at least one front cavity by selectively removing at least outer layer of the inner front end section, such that there is one cavity opposite each island of membrane on the front side of the front electrode on the opposite side to the island of active membrane; viii. Applying an outer front end section to the inner front end section and bonding the outer front end section to an outer surface of the inner front end section such that the outer front end section spans across and seals the at least one cavity of the array of front cavities.-
公开(公告)号：US10508364B2
公开(公告)日：2019-12-17
申请号：US15468609
申请日：2017-03-24
发明人： Dror Hurwitz
摘要： A single crystal membrane of BaxSr(1-x)TiO3 (BST) has been fabricated for the first time using molecular beam epitaxy. The membrane typically has a thickness of 200 nm to 500 nm and the thickness may be controlled to within 1%. It may be fabricated on a sapphire wafer carrier from which it may subsequently be detached. The smoothness of the membrane has an RMS of less than 1 nm. This membrane is very promising for the next generation of RF filters.
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公开(公告)号：US20230087781A1
公开(公告)日：2023-03-23
申请号：US17480233
申请日：2021-09-21
发明人： Dror Hurwitz , Zhihui Fu , Weiqiang Hu
摘要： An acoustic resonator that has a first electrode with a first planar portion. A second electrode having a second planar portion is disposed parallel to the first planar portion. This second electrode has a bifurcated end that defines a gap. A piezoelectric layer is disposed between and contacts both the first planar portion and the second planar portion. Also contacting the piezoelectric layer is the bifurcated end of the second electrode. The gap is formed in the periphery of each resonator within a filter. It is formed in the top electrode, that is typically formed of molybdenum, but could be formed from other metals as well. Unlike a gap between a top electrode and piezoelectric material, the gap recited herein is entirely within the second electrode. This structure is compatible with an inner passivation layer that enables a single crystal piezoelectric layer and a larger bottom electrode.
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公开(公告)号：US10153750B2
公开(公告)日：2018-12-11
申请号：US15494825
申请日：2017-04-24
发明人： Dror Hurwitz
摘要： A filter package comprising an array of piezoelectric films sandwiched between lower electrodes and an array of upper electrodes covered by an array of silicon membranes with cavities thereover: the lower electrode being coupled to an interposer with a first cavity between the lower electrodes and the interposer; the array of silicon membranes having a known thickness and attached over the upper electrodes with an array of upper cavities, each upper cavity between a silicon membrane of the array and a common silicon cover; each upper cavity aligned with a piezoelectric film, an upper electrode and silicon membrane, the upper cavities having side walls comprising SiO2; the individual piezoelectric films, their upper electrodes and silicon membranes thereover being separated from adjacent piezoelectric films, upper electrodes and silicon membranes by a passivation material.
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公开(公告)号：US20240113694A1
公开(公告)日：2024-04-04
申请号：US17975898
申请日：2022-10-28
发明人： Dror HURWITZ , Chuanxiang DAI , Ming TIAN
摘要： A novel hybrid band-pass filter is realized using semiconductor integrated hybrid technology, and includes two acoustic resonance units, and one IPD filter unit. The filter unit may be implemented as a high-pass filter, a low-pass filter, or a band-pass filter. The two acoustic resonance units and the IPD filter unit are arranged on a matching substrate, for example, by way of flip-chip technology and welding of electrodes, and a polymer filled shell is formed external to and surrounding the acoustic resonance units and the IPD filter unit to prevent oxidation and to maintain integrity of the weld points. The first acoustic resonance unit is connected with an input terminal of the IPD filter through a matching inductor, an output terminal of the IPD filter is connected with the second acoustic resonance unit through a matching inductor, and finally, the two acoustic resonance units and the IPD filter unit are integrated on the matching substrate. The band-pass filter is characterized by low loss, high suppression, wide passband and high rectangular coefficient, and also has the advantages of small size, high yield, good batch consistency and suitability for batch production.
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公开(公告)号：US11245383B2
公开(公告)日：2022-02-08
申请号：US16521752
申请日：2019-07-25
发明人： Dror Hurwitz , BawChing Perng , Duan Feng
摘要： A packaged electronic component comprising: an electronic component housed within a package comprising a front part of a package comprising an inner section with a front cavity therein opposite the electronic component defined by the raised frame and an outer section sealing said cavity; and a back part of the package comprising a back cavity in an inner back section, and an outer back section sealing the cavity, said back package further comprising a first and a second via through the back end around said at least one back cavity for coupling to front and back electrodes of the electronic component; the vias terminating in external contact pads adapted to couple the package in a flip chip configuration to a circuit board.
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公开(公告)号：US20210297054A1
公开(公告)日：2021-09-23
申请号：US17342756
申请日：2021-06-09
发明人： Dror Hurwitz , BawChing Perng , Duan Feng
IPC分类号： H03H9/02 , H01L23/538 , H01L23/00 , H01L41/047 , H01L41/09 , H01L41/18 , H03H9/17
摘要： A package for an electronic component, the package comprising a front end, a back end, and an active membrane layer sandwiched between front and back electrodes of conducting material; wherein front electrode has a surface that extends beyond an adjacent surface of the active membrane layer, the active membrane mechanically supported by the front end and covered by a back end comprising at least one back cavity having organic walls and lid of organic material, with filled through vias traversing the organic walls and lid for coupling to the electrodes by an internal routing layer; the vias being coupleable by external solderable bumps to a circuit board for coupling the package in a flip chip configuration.
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