OPTICAL BEAM FORMING APPARTUS
    2.
    发明申请
    OPTICAL BEAM FORMING APPARTUS 审中-公开
    光束形成APPARTUS

    公开(公告)号:US20110205880A1

    公开(公告)日:2011-08-25

    申请号:US13033868

    申请日:2011-02-24

    IPC分类号: G11B7/00

    摘要: An optical beam forming apparatus capable of forming a polarization of laser beam into an elliptic polarization includes a beam source to emit a semiconductor laser beam, a wave plate to receive the beam emitted from the beam source and to form an elliptic polarization, and a lens to focus the beam passed through the wave plate to form a beam spot on a disc.

    摘要翻译: 能够将激光束的偏振形成为椭圆偏振的光束形成装置包括发射半导体激光束的光束源,接收从光束源发射的光束并形成椭圆偏振的波片,以及透镜 以将通过波片的光束聚焦以在光盘上形成光斑。

    Electrostatic discharge circuit and method for reducing input capacitance of semiconductor chip including same
    3.
    发明授权
    Electrostatic discharge circuit and method for reducing input capacitance of semiconductor chip including same 失效
    静电放电电路及降低包括其的半导体芯片的输入电容的方法

    公开(公告)号:US07764475B2

    公开(公告)日:2010-07-27

    申请号:US11645528

    申请日:2006-12-27

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0266

    摘要: A multi-mode electrostatic discharge (ESD) circuit for a semiconductor chip comprises first and second ESD diodes. In a first mode, a body voltage greater than a power source voltage of the semiconductor chip is applied to the first ESD diode and a body voltage less than a ground voltage of the semiconductor chip is applied to the second ESD diode. In a second mode, a body voltage substantially equal to the power source voltage of the semiconductor chip is applied to the body of the first ESD diode and a body voltage substantially equal to the ground voltage of the semiconductor chip is applied to the second ESD diode.

    摘要翻译: 用于半导体芯片的多模式静电放电(ESD)电路包括第一和第二ESD二极管。 在第一模式中,将大于半导体芯片的电源电压的体电压施加到第一ESD二极管,并且将小于半导体芯片的接地电压的体电压施加到第二ESD二极管。 在第二模式中,将基本上等于半导体芯片的电源电压的体电压施加到第一ESD二极管的主体,并且将基本上等于半导体芯片的接地电压的体电压施加到第二ESD二极管 。

    Optical pickup apparatus
    4.
    发明授权
    Optical pickup apparatus 有权
    光拾取装置

    公开(公告)号:US07613095B2

    公开(公告)日:2009-11-03

    申请号:US11290457

    申请日:2005-12-01

    IPC分类号: G11B7/00

    摘要: An optical pickup apparatus according to an embodiment of the present invention, comprises an optical unit for projecting a plurality of wavelengths of light, the light including a celadon light, toward a recording medium and receiving the light reflected from the recording medium to thereby detect an information signal and an error signal, and a compatible objective lens for focusing a light projected from the optical unit to thereby form an optical spot on a recording surface of the recording medium and applying at least three light having different wavelength ranges to be compatibly used for both the high-density and the low-density recording mediums. Accordingly, the optical pickup apparatus is capable of compatibly employing a high-density recording medium, which uses a celadon light and is slimmer than a digital versatile disc (DVD), and at least one low-density recording medium.

    摘要翻译: 根据本发明实施例的光学拾取装置包括一个光学单元,用于将多个波长的光(包括青瓷光的光)投射到记录介质上,并接收从记录介质反射的光,从而检测一个 信息信号和误差信号,以及用于聚焦从光学单元投影的光的兼容物镜,从而在记录介质的记录表面上形成光点,并且将至少三个具有不同波长范围的光并入,用于 高密度和低密度记录介质。 因此,光拾取装置能够兼容使用青瓷光的高密度记录介质,并且比数字通用盘(DVD)更薄,以及至少一种低密度记录介质。

    Memory module testing apparatus and method of testing memory modules
    5.
    发明授权
    Memory module testing apparatus and method of testing memory modules 有权
    内存模块测试设备和测试内存模块的方法

    公开(公告)号:US07487413B2

    公开(公告)日:2009-02-03

    申请号:US11398719

    申请日:2006-04-06

    IPC分类号: G11C29/00

    CPC分类号: G11C29/56 G11C5/04

    摘要: A memory module testing apparatus and method include a test slot adapted to receive a target memory module, wherein the target memory module includes a first memory unit to store information related to the target memory module. The memory module testing apparatus further includes a second memory unit adapted to store information related to a memory module, and a first switching unit adapted to selectively provide a driving signal to at least one of the first memory unit and the second memory unit.

    摘要翻译: 存储器模块测试装置和方法包括适于接收目标存储器模块的测试槽,其中所述目标存储器模块包括用于存储与所述目标存储器模块相关的信息的第一存储器单元。 存储器模块测试装置还包括适于存储与存储器模块相关的信息的第二存储器单元,以及适于选择性地向第一存储器单元和第二存储器单元中的至少一个提供驱动信号的第一开关单元。

    Semiconductor memory module and semiconductor memory device
    6.
    发明授权
    Semiconductor memory module and semiconductor memory device 有权
    半导体存储器模块和半导体存储器件

    公开(公告)号:US07426149B2

    公开(公告)日:2008-09-16

    申请号:US11540607

    申请日:2006-10-02

    IPC分类号: G11C7/00

    摘要: A semiconductor memory module and a semiconductor memory device are disclosed. In one embodiment, the invention provides a semiconductor memory module comprising a circuit board, a plurality of semiconductor memory devices adapted to operate during a test mode and a normal operation mode and mounted on the circuit board, a first signal line set comprising a plurality of first signal lines connected to the plurality of semiconductor memory devices, and a plurality of second signal line sets. Each semiconductor memory device comprises first terminals adapted to receive first signals from the first signal lines, second terminals connected to a corresponding one of the second signal line sets, a third terminal adapted to receive an enable signal during the test mode, and a signal transmitting unit adapted to output second signals to the second terminals in response to the enable signal.

    摘要翻译: 公开了半导体存储器模块和半导体存储器件。 在一个实施例中,本发明提供了一种半导体存储器模块,包括电路板,多个半导体存储器件,适于在测试模式和正常操作模式下操作并安装在电路板上,第一信号线组包括多个 连接到多个半导体存储器件的第一信号线,以及多个第二信号线组。 每个半导体存储器件包括适于从第一信号线接收第一信号的第一端子,连接到第二信号线组中对应的一个信号线组的第二端子,适于在测试模式期间接收使能信号的第三端子,以及信号发送 该单元适于响应于使能信号将第二信号输出到第二终端。

    Output buffer circuit for semiconductor memory device
    7.
    发明授权
    Output buffer circuit for semiconductor memory device 有权
    半导体存储器件的输出缓冲电路

    公开(公告)号:US07355900B2

    公开(公告)日:2008-04-08

    申请号:US11360506

    申请日:2006-02-24

    申请人: Young-Man Ahn

    发明人: Young-Man Ahn

    IPC分类号: G11C7/10

    CPC分类号: G11C7/1051 G11C7/1057

    摘要: There is provided an output buffer circuit for a semiconductor memory device. The output buffer circuit includes: a main buffer and parallel connected auxiliary buffer receiving an input signal. A selection circuit controls the auxiliary buffer by selectively defining a selected input signal in relation to the input signal and an adjacent input signal.

    摘要翻译: 提供了一种用于半导体存储器件的输出缓冲电路。 输出缓冲电路包括:主缓冲器和并联的辅助缓冲器,接收输入信号。 选择电路通过相对于输入信号和相邻输入信号选择性地定义所选择的输入信号来控制辅助缓冲器。

    Output buffer circuit for semiconductor memory device
    8.
    发明申请
    Output buffer circuit for semiconductor memory device 有权
    半导体存储器件的输出缓冲电路

    公开(公告)号:US20060239084A1

    公开(公告)日:2006-10-26

    申请号:US11360506

    申请日:2006-02-24

    申请人: Young-Man Ahn

    发明人: Young-Man Ahn

    IPC分类号: G11C7/10

    CPC分类号: G11C7/1051 G11C7/1057

    摘要: There is provided an output buffer circuit for a semiconductor memory device. The output buffer circuit includes: a main buffer and parallel connected auxiliary buffer receiving an input signal. A selection circuit controls the auxiliary buffer by selectively defining a selected input signal in relation to the input signal and an adjacent input signal.

    摘要翻译: 提供了一种用于半导体存储器件的输出缓冲电路。 输出缓冲电路包括:主缓冲器和并联的辅助缓冲器,接收输入信号。 选择电路通过相对于输入信号和相邻输入信号选择性地定义所选择的输入信号来控制辅助缓冲器。

    Determining operation mode for semiconductor memory device
    9.
    发明申请
    Determining operation mode for semiconductor memory device 有权
    确定半导体存储器件的工作模式

    公开(公告)号:US20060098513A1

    公开(公告)日:2006-05-11

    申请号:US11256580

    申请日:2005-10-21

    IPC分类号: G11C8/00

    CPC分类号: G11C29/46 G11C11/401

    摘要: A semiconductor memory device capable of determining an operation mode by using states of data pins, and an operation mode determining method for the same are disclosed. The semiconductor memory device includes at least one MRS input pad, at least one data input pad, and an operation mode determining circuit. The operation mode determining circuit generates an operation mode determining signal, when an MRS command input through the MRS input pad corresponds to a predetermined MRS command and data signals input through the data input pad or pads include a predetermined combination. Accordingly, the efficiency in the manufacturing and producing processes may be improved by determining the operation mode of the semiconductor memory device in a module assembly process.

    摘要翻译: 公开了能够通过使用数据引脚的状态来确定操作模式的半导体存储器件及其操作模式确定方法。 半导体存储器件包括至少一个MRS输入焊盘,至少一个数据输入焊盘和操作模式确定电路。 当通过MRS输入焊盘输入的MRS命令对应于预定的MRS命令并且通过数据输入焊盘或焊盘输入的数据信号包括预定的组合时,操作模式确定电路产生操作模式确定信号。 因此,可以通过在模块组装过程中确定半导体存储器件的操作模式来改善制造和制造工艺中的效率。

    Apparatus and method for generating tracking error signal
    10.
    发明授权
    Apparatus and method for generating tracking error signal 失效
    用于产生跟踪误差信号的装置和方法

    公开(公告)号:US07035178B2

    公开(公告)日:2006-04-25

    申请号:US10337361

    申请日:2003-01-07

    IPC分类号: G11B7/00

    摘要: An apparatus for and a method of producing a push-pull tracking error signal in an optical disc system having four light-receiving sections A, B, C, and D arranged in a radial direction of the optical disc. Pairs of signals PA, PB, PC and PD, corresponding to light receiving sections A, B, C and D, respectively are differentially combined to provide differential signals. One differential signal is filtered, amplified and differentially combined with another differential signal to output a tracking error signal. Accordingly, distortion of the tracking error signal during jumping to a desired track and distortion of the tracking error signal due to a defect of the optical disc are prevented.

    摘要翻译: 在具有沿光盘的径向布置的四个光接收部分A,B,C和D的光盘系统中产生推挽跟踪误差信号的装置和方法。 对应于光接收部分A的信号对P,P,B,P,C和D, B,C和D分别差分组合以提供差分信号。 一个差分信号被滤波,放大并与另一个差分信号差分地组合以输出跟踪误差信号。 因此,防止了跳跃到期望的轨道期间的跟踪误差信号的失真以及由于光盘的缺陷导致的跟踪误差信号的失真。