Abstract:
In accordance with example embodiments, a plasma processing apparatus includes a chamber configured to peform a plasma process, an upper plate on the chamber, an antenna under the upper plate and the antenna is configured to generate plasma in the chamber, an upper insulator between the upper plate and the antenna and the upper insulator covers a top of the antenna, a lower insulator covering a bottom of the antenna, an antenna support ring configured to fix the antenna to the upper plate, and a metal gasket adhered to the antenna support ring.
Abstract:
A microwave resonance plasma generating apparatus, a plasma processing system having the same and a method of generating a microwave resonance plasma are provided. The apparatus includes a microwave generating unit which generates a microwave, and a plasma producing unit which produces electrons and photons of high energy using the microwave generated from the microwave generating unit. The plasma producing unit includes a coaxial waveguide having an inner electrode disposed adjacent to the microwave generating unit, an outer electrode connected to the microwave generating unit and disposed to coaxially surround a portion of the inner electrode, the outer electrode being shorter than the inner electrode, and a dielectric tube disposed between the inner electrode and the outer electrode to insulate between the inner electrode and the outer electrode. The coaxial waveguide utilizes a principle of “cut or truncated electrode of coaxial waveguide” and a resonance phenomenon of Langmiur.
Abstract:
A plasma-discharge light emitting device is provided. The plasma-discharge light emitting device may include: rear and front panels separated from each other in a predetermined interval, wherein at least one discharge cell may be provided between the rear and front panels, and wherein plasma discharge may be generated in the discharge cells; a pair of discharge electrodes provided on at least one of the rear and front panels for each of the discharge cells; a trench provided as a portion of each of the discharge cells between the pair of the discharge electrodes; and electron-emitting material layers provided on both sidewalls of the trench.
Abstract:
A plasma based ion implantation system capable of generating a capacitively coupled plasma having beneficial characteristics for an ion implantation, including the generation of necessary ions and radicals only for an ion implantation process instead of generating an inductively coupled plasma, which generates unnecessary ions and excessively dissociates radicals. The plasma based ion implantation system easily controls plasma ions implanted by cleaning a vacuum chamber, minimizes problems of unnecessary deposition and occurrence of contaminants and increases the number of components used only for the plasma ion implantion by reducing the deposition of polymer layer on a workpiece. The plasma based ion implantation system easily control uniformity of the plasma by using a flat type electrode, thereby easily ensuring uniformity of plasma ions implanted into the workpiece.
Abstract:
Provided is a flat lamp that includes: an upper substrate and a lower substrate arranged to face each other and separated by a predetermined distance, with at least one discharge cell formed between the upper and lower substrates; and at least one pair of a first electrode portion and a second electrode portion formed on at least one of the upper and lower substrates, wherein one pair corresponds to one discharge cell, and the first electrode portion is composed of an electrode and the second electrode portion is composed of a plurality of electrodes.
Abstract:
A method of fabricating a semiconductor device may include: forming a field region defining an active region in a substrate; forming a gate trench in which the active and field regions are partially exposed; forming a gate insulating layer on a surface of the active region; conformally forming a gate barrier layer including metal on the gate insulating layer and partially exposed field region; forming a gate electrode layer including metal on the gate barrier layer; and/or forming a gate capping layer. Forming the gate insulating layer may include forming a first gate oxide layer by primarily oxidizing the active region's surface, and forming a second gate oxide layer between the active region's surface and the first gate oxide layer by secondarily oxidizing the active region's surface. The gate capping layer may be in contact with the gate insulating layer, gate barrier layer, and/or gate electrode layer.
Abstract:
Semiconductor devices, and methods of fabricating the same, include forming device isolation regions in a substrate to define active regions, forming gate trenches in the substrate to expose the active regions and device isolation regions, conformally forming a preliminary gate insulating layer including silicon oxide on the active regions exposed in the grate trenches, nitriding the preliminary gate insulating layer using a radio-frequency bias having a frequency of about 13.56 MHz and power between about 100 W and about 300 W to form a nitrided preliminary gate insulating layer including silicon oxynitride, forming a gate electrode material layer on the nitride preliminary gate insulating layer, partially removing the nitrided preliminary gate insulating layer and the gate electrode material layer to respectively form a gate insulating layer and a gate electrode layer, and forming a gate capping layer on the gate electrode layer to fill the gate trenches.
Abstract:
A method of fabricating a semiconductor device may include forming active and field regions in a substrate; forming a gate trench in which the active and field regions are exposed; forming a gate insulating layer on a surface of the exposed active region, wherein forming the gate insulating layer includes forming a first gate oxide layer by primarily oxidizing the surface of the active region, and forming a second gate oxide layer between the surface of the active region and the first gate oxide layer by secondarily oxidizing the surface of the active region; conformally forming a gate barrier layer on the gate insulating layer and the exposed field region; forming a gate electrode layer on the gate barrier layer; and forming a gate capping layer in contact with the gate insulating layer, the gate barrier layer, and the gate electrode layer in the gate trench.
Abstract:
In accordance with example embodiments, a plasma processing apparatus includes a chamber configured to perform a plasma process, an upper plate on the chamber, an antenna under the upper plate and the antenna is configured to generate plasma in the chamber, an upper insulator between the upper plate and the antenna and the upper insulator covers a top of the antenna, a lower insulator covering a bottom of the antenna, an antenna support ring configured to fix the antenna to the upper plate, and a metal gasket adhered to the antenna support ring.
Abstract:
In accordance with example embodiments, a plasma processing apparatus includes a chamber configured to perform a plasma process, an upper plate on the chamber, an antenna under the upper plate and the antenna is configured to generate plasma in the chamber, an upper insulator between the upper plate and the antenna and the upper insulator covers a top of the antenna, a lower insulator covering a bottom of the antenna, an antenna support ring configured to fix the antenna to the upper plate, and a metal gasket adhered to the antenna support ring.