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公开(公告)号：US20090296440A1
公开(公告)日：2009-12-03
申请号：US12470584
申请日：2009-05-22
Applicant: Shian-Nan Lin , Wen-Lung Wu
Inventor： Shian-Nan Lin , Wen-Lung Wu
IPC: H02M7/06
CPC classification number: H02M1/4258 , Y02B70/126
Abstract: A single-stage AC to DC conversion device includes an energy storage unit, a magnetic unit, and a switch unit. The magnetic unit electrically connects the energy storage unit with the switch unit, and has a core, a first winding, a second winding, a third winding, and at least one output winding. The first winding couples with the core and transfers a first electric energy to the core. The second winding couples with the core and stores a second electric energy in the energy storage unit. The third winding couples with the core and transfers the second electric energy to the core. The output winding couples with the core that transfers the first electric energy and the second electric energy, and outputs a third electric energy through the output winding.
Abstract translation: 单级AC-DC转换装置包括能量存储单元，磁性单元和开关单元。 磁性单元将能量存储单元与开关单元电连接，并且具有芯，第一绕组，第二绕组，第三绕组和至少一个输出绕组。 第一个绕组具有核心，并将第一个电能传递到核心。 第二绕组与核心耦合并且在能量存储单元中存储第二电能。 第三绕组与核心耦合，并将第二电能传递到核心。 输出绕组与芯体耦合，其传送第一电能和第二电能，并通过输出绕组输出第三电能。
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公开(公告)号：US08233291B2
公开(公告)日：2012-07-31
申请号：US12470584
申请日：2009-05-22
Applicant: Shian-Nan Lin , Wen-Lung Wu
Inventor： Shian-Nan Lin , Wen-Lung Wu
IPC: H02M3/335
CPC classification number: H02M1/4258 , Y02B70/126
Abstract: A single-stage AC to DC conversion device includes an energy storage unit, a magnetic unit, and a switch unit. The magnetic unit electrically connects the energy storage unit with the switch unit, and has a core, a first winding, a second winding, a third winding, and at least one output winding. The first winding couples with the core and transfers a first electric energy to the core. The second winding couples with the core and stores a second electric energy in the energy storage unit. The third winding couples with the core and transfers the second electric energy to the core. The output winding couples with the core that transfers the first electric energy and the second electric energy, and outputs a third electric energy through the output winding.
Abstract translation: 单级AC-DC转换装置包括能量存储单元，磁性单元和开关单元。 磁性单元将能量存储单元与开关单元电连接，并且具有芯，第一绕组，第二绕组，第三绕组和至少一个输出绕组。 第一个绕组具有核心，并将第一个电能传递到核心。 第二绕组与核心耦合并且在能量存储单元中存储第二电能。 第三绕组与核心耦合，并将第二电能传递到核心。 输出绕组与芯体耦合，其传送第一电能和第二电能，并通过输出绕组输出第三电能。
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Patent Agency Ranking
公开(公告)号：US07091623B2
公开(公告)日：2006-08-15
申请号：US10980671
申请日：2004-11-02
Applicant: Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
Inventor： Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
CPC classification number: H01L25/50 , H01L24/97 , H01L25/0657 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2225/06575 , H01L2225/06582 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/351 , H01L2924/00014 , H01L2224/83 , H01L2224/85 , H01L2924/00
Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated package products.
Abstract translation: 提供一种多芯片半导体封装及其制造方法。 制备具有上表面和下表面的基材。 至少第一芯片安装在基板的上表面上。 在第一芯片和基板的上表面上的预定区域上施加非导电材料。 至少第二芯片安装在非导电材料上，并形成有至少一个与第一芯片无干涉位置的悬挂部分，其中非导电材料的尺寸设计在至少对应于第二芯片的表面积 以使悬挂部分能够支撑在非导电材料上。 通过将第二芯片完全支撑在非导电材料上，而不会导致常规的芯片裂纹问题，可以有效地确保制造的封装产品的结构完整性和可靠性。
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公开(公告)号：US20060255744A1
公开(公告)日：2006-11-16
申请号：US11188841
申请日：2005-07-26
Applicant: Wen-Lung Wu , Chung-Ping Ku , Li-Ling Lee , H. Lee
Inventor： Wen-Lung Wu , Chung-Ping Ku , Li-Ling Lee , H. Lee
CPC classification number: H05B33/0815 , H05B33/0803 , H05B33/0857
Abstract: A LED illuminating module is provided. A plurality of LEDs are directly disposed on a circuit board to thin out the whole module and minimize its volume. A problem that the circuit board of the conventional LED illuminating module and a board provided with the LEDs are separate is resolved.
Abstract translation: 提供LED照明模块。 多个LED直接设置在电路板上，以使整个模块变薄并使其体积最小化。 解决了常规LED照明模块的电路板和设置有LED的板分离的问题。
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公开(公告)号：US06879030B2
公开(公告)日：2005-04-12
申请号：US10262309
申请日：2002-09-30
Applicant: Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
Inventor： Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
IPC: H01L23/31 , H01L23/495 , H01L23/02
CPC classification number: H01L24/97 , H01L23/3114 , H01L23/3135 , H01L23/4951 , H01L24/45 , H01L24/48 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/97 , H01L2924/00014 , H01L2924/01033 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311 , H01L2924/351 , H01L2224/85 , H01L2924/00 , H01L2224/05599
Abstract: A strengthened window-type semiconductor package is provided. A substrate having an opening is mounted with at least a chip in a manner that, an active surface of the chip covers and partly exposed to the opening, and electrically connected to the substrate by bonding wires formed through the opening. An elastic non-conductive material is applied over the chip exclusive of the active surface. An upper encapsulant is formed to encapsulate the chip and the non-conductive material, and a lower encapsulant is formed to encapsulate the bonding wires and seal the opening. With provision of the non-conductive material for encapsulating the chip before forming the upper encapsulant, the chip can be prevented from cracking particularly at corner and edge positions that encounter relatively greater thermal stress during subsequent fabrication processes such as curing of the upper encapsulant and thermal cycles.
Abstract translation: 提供了一种加强的窗型半导体封装。 具有开口的基板至少以芯片的形式安装，芯片的有效表面覆盖并部分地暴露于开口，并且通过通过开口形成的接合线电连接到基板。 弹性非导电材料施加在芯片之上，而非活性表面。 形成上部密封剂以封装芯片和非导电材料，并且形成下部密封剂以封装接合线并密封开口。 通过提供用于在形成上部密封剂之前封装芯片的非导电材料，特别是在随后的制造过程中遇到相对较大的热应力的拐角和边缘位置，例如固化上密封剂和热 周期。
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公开(公告)号：US20050064631A1
公开(公告)日：2005-03-24
申请号：US10980671
申请日：2004-11-02
Applicant: Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
Inventor： Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
IPC: H01L21/44 , H01L21/50 , H01L21/98 , H01L25/065 , H01L29/768
CPC classification number: H01L25/50 , H01L24/97 , H01L25/0657 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2225/06575 , H01L2225/06582 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/351 , H01L2924/00014 , H01L2224/83 , H01L2224/85 , H01L2924/00
Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated package products.
Abstract translation: 提供一种多芯片半导体封装及其制造方法。 制备具有上表面和下表面的基材。 至少第一芯片安装在基板的上表面上。 在第一芯片和基板的上表面上的预定区域上施加非导电材料。 至少第二芯片安装在非导电材料上，并形成有至少一个与第一芯片无干涉位置的悬挂部分，其中非导电材料的尺寸设计在至少对应于第二芯片的表面积 以使悬挂部分能够支撑在非导电材料上。 通过将第二芯片完全支撑在非导电材料上，而不会导致常规的芯片裂纹问题，可以有效地确保制造的封装产品的结构完整性和可靠性。
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公开(公告)号：US06825064B2
公开(公告)日：2004-11-30
申请号：US10261796
申请日：2002-09-30
Applicant: Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
Inventor： Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
IPC: H01L2144
CPC classification number: H01L25/50 , H01L24/97 , H01L25/0657 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2225/06575 , H01L2225/06582 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/351 , H01L2924/00014 , H01L2224/83 , H01L2224/85 , H01L2924/00
Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated-package products.
Abstract translation: 提供一种多芯片半导体封装及其制造方法。 制备具有上表面和下表面的基材。 至少第一芯片安装在基板的上表面上。 在第一芯片和基板的上表面上的预定区域上施加非导电材料。 至少第二芯片安装在非导电材料上，并形成有至少一个与第一芯片无干涉位置的悬挂部分，其中非导电材料的尺寸设计在至少对应于第二芯片的表面积 以使悬挂部分能够支撑在非导电材料上。 由于第二芯片完全支撑在非导电材料上，而不会导致常规的芯片裂纹问题，因此可以有效地确保制造的封装产品的结构完整性和可靠性。
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