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公开(公告)号：US08598463B2
公开(公告)日：2013-12-03
申请号：US13050009
申请日：2011-03-17
申请人： Tzyy-Jang Tseng , Chang-Ming Lee , Wen-Fang Liu , Cheng-Po Yu
发明人： Tzyy-Jang Tseng , Chang-Ming Lee , Wen-Fang Liu , Cheng-Po Yu
CPC分类号： H05K3/12 , C23C18/1605 , C23C18/165 , C25D5/022 , H05K1/0203 , H05K1/056 , H05K3/02 , H05K3/181 , H05K3/188 , H05K3/3436 , H05K2201/0187 , Y10T29/302 , Y10T29/49155 , Y10T156/10
摘要： A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer.
摘要翻译： 电路板包括金属图案层，导热板，电绝缘层和至少一个电绝缘材料。 导热板具有平面。 电绝缘层设置在金属图案层和平面之间并且部分覆盖平面。 电绝缘材料覆盖未被电绝缘层覆盖并接触导热板的平面。 电绝缘层暴露电绝缘材料，并且电绝缘材料的热导率大于电绝缘层的热导率。
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公开(公告)号：US08294042B2
公开(公告)日：2012-10-23
申请号：US12844109
申请日：2010-07-27
申请人： Chang-Ming Lee , Wen-Fang Liu , Shih-Jung Huang , Ling-Kai Su
发明人： Chang-Ming Lee , Wen-Fang Liu , Shih-Jung Huang , Ling-Kai Su
CPC分类号： H05K3/4092 , H05K3/4007 , H05K2201/0311 , Y10T29/49204
摘要： A method of manufacturing a connector is provided. Firstly, a substrate having a first surface, a second surface opposite to the first surface and a through hole is provided. Next, a first conductive layer covering the inside wall of the through hole is formed on the substrate. Then, a filler is filled in the through hole to form a filler post. Next, a conductive elastic cantilever is formed over the first surface and electrically connected to the first conductive layer. Then, a gold layer is formed on the conductive elastic cantilever and over the first surface. A solder ball electrically connected to the first conductive layer is formed over the second surface.
摘要翻译： 提供一种制造连接器的方法。 首先，提供具有第一表面，与第一表面相对的第二表面和通孔的基板。 接着，在基板上形成覆盖贯通孔的内壁的第一导电层。 然后，在通孔中填充填料以形成填料柱。 接下来，在第一表面上形成导电弹性悬臂，并电连接到第一导电层。 然后，在导电弹性悬臂上形成金层，并在第一表面上形成金层。 电连接到第一导电层的焊球形成在第二表面上。
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公开(公告)号：US20120031651A1
公开(公告)日：2012-02-09
申请号：US12944275
申请日：2010-11-11
申请人： TZYY-JANG TSENG , Chang-Ming Lee , Wen-Fang Liu , Cheng-Po Yu
发明人： TZYY-JANG TSENG , Chang-Ming Lee , Wen-Fang Liu , Cheng-Po Yu
CPC分类号： H05K1/0203 , H05K1/056 , H05K3/3436 , H05K2201/0187 , H05K2201/10106
摘要： A circuit board including a circuit layer, a thermally conductive substrate, an insulation layer, and at least one thermally conductive material is provided. The thermally conductive substrate has a plane. The insulation layer is disposed between the circuit layer and the plane and partially covers the plane. The thermally conductive material covers the plane without covered by the insulation layer and is in contact with the thermally conductive substrate. The insulation layer exposes the thermally conductive material.
摘要翻译： 提供了包括电路层，导热基板，绝缘层和至少一种导热材料的电路板。 导热基板具有平面。 绝缘层设置在电路层和平面之间，并部分覆盖平面。 导热材料覆盖该平面而不被绝缘层覆盖，并与导热基板接触。 绝缘层暴露导热材料。
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公开(公告)号：US20120026708A1
公开(公告)日：2012-02-02
申请号：US12845717
申请日：2010-07-28
申请人： Shih-Jung Huang , Wen-Fang Liu , Ling-Kai Su
发明人： Shih-Jung Huang , Wen-Fang Liu , Ling-Kai Su
CPC分类号： H05K3/4015 , H05K1/141 , H05K3/3436 , H05K3/368 , H05K3/4007 , H05K2201/0311 , H05K2201/10378
摘要： A carrier substrate includes a substrate having a chip side and a PCB side, a plurality of bond pads disposed on the chip side for bonding a chip, a plurality of land grid array (LGA) pads disposed on the PCB side, and a plurality of resilient flanges installed on the PCB side in an array manner. The plurality of resilient flanges electrically connects with the LGA pads correspondingly.
摘要翻译： 载体基板包括具有芯片侧和PCB侧的基板，设置在芯片侧的用于接合芯片的多个接合焊盘，设置在PCB侧的多个焊盘格栅阵列（LGA）焊盘，以及多个 弹性凸缘以阵列方式安装在PCB侧。 多个弹性凸缘相应地与LGA垫电连接。
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公开(公告)号：US20100266752A1
公开(公告)日：2010-10-21
申请号：US12763224
申请日：2010-04-20
申请人： Tzyy-Jang Tseng , Cheng-Po Yu , Wen-Fang Liu
发明人： Tzyy-Jang Tseng , Cheng-Po Yu , Wen-Fang Liu
IPC分类号： H05K3/10
CPC分类号： H05K3/107 , H05K1/036 , H05K1/0373 , H05K3/181 , H05K3/184 , H05K3/185 , H05K2201/0236 , H05K2201/0257 , H05K2203/0264 , H05K2203/107 , H05K2203/308
摘要： A method for forming a circuit board structure of composite material is disclosed. First, a composite material structure including a substrate and a composite material dielectric layer is provided. The composite material dielectric layer includes a catalyst dielectric layer contacting the substrate and at least one sacrificial layer contacting the catalyst dielectric layer. The sacrificial layer is insoluble in water. Later, the composite material dielectric layer is patterned and simultaneously catalyst particles are activated. Then, a conductive layer is formed on the activated catalyst particles. Afterwards, at least one sacrificial layer is removed.
摘要翻译： 公开了一种形成复合材料的电路板结构的方法。 首先，提供包括基板和复合材料介电层的复合材料结构。 复合材料介电层包括与基底接触的催化剂介电层和与催化剂介电层接触的至少一个牺牲层。 牺牲层不溶于水。 之后，复合材料介电层被图案化，同时催化剂颗粒被激活。 然后，在活化的催化剂颗粒上形成导电层。 之后，去除至少一个牺牲层。
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公开(公告)号：US20120031652A1
公开(公告)日：2012-02-09
申请号：US13050009
申请日：2011-03-17
申请人： TZYY-JANG TSENG , Chang-Ming Lee , Wen-Fang Liu , Cheng-Po Yu
发明人： TZYY-JANG TSENG , Chang-Ming Lee , Wen-Fang Liu , Cheng-Po Yu
CPC分类号： H05K3/12 , C23C18/1605 , C23C18/165 , C25D5/022 , H05K1/0203 , H05K1/056 , H05K3/02 , H05K3/181 , H05K3/188 , H05K3/3436 , H05K2201/0187 , Y10T29/302 , Y10T29/49155 , Y10T156/10
摘要： A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer.
摘要翻译： 电路板包括金属图案层，导热板，电绝缘层和至少一个电绝缘材料。 导热板具有平面。 电绝缘层设置在金属图案层和平面之间并且部分覆盖平面。 电绝缘材料覆盖未被电绝缘层覆盖并接触导热板的平面。 电绝缘层暴露电绝缘材料，并且电绝缘材料的热导率大于电绝缘层的热导率。
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公开(公告)号：US20120024584A1
公开(公告)日：2012-02-02
申请号：US12844109
申请日：2010-07-27
申请人： Chang-Ming Lee , Wen-Fang Liu , Shih-Jung Huang , Ling-Kai Su
发明人： Chang-Ming Lee , Wen-Fang Liu , Shih-Jung Huang , Ling-Kai Su
CPC分类号： H05K3/4092 , H05K3/4007 , H05K2201/0311 , Y10T29/49204
摘要： A method of manufacturing a connector is provided. Firstly, a substrate having a first surface, a second surface opposite to the first surface and a through hole is provided. Next, a first conductive layer covering the inside wall of the through hole is formed on the substrate. Then, a filler is filled in the through hole to form a filler post. Next, a conductive elastic cantilever is formed over the first surface and electrically connected to the first conductive layer. Then, a gold layer is formed on the conductive elastic cantilever and over the first surface. A solder ball electrically connected to the first conductive layer is formed over the second surface.
摘要翻译： 提供一种制造连接器的方法。 首先，提供具有第一表面，与第一表面相对的第二表面和通孔的基板。 接着，在基板上形成覆盖贯通孔的内壁的第一导电层。 然后，在通孔中填充填料以形成填料柱。 接下来，在第一表面上形成导电弹性悬臂，并电连接到第一导电层。 然后，在导电弹性悬臂上形成金层，并在第一表面上形成金层。 电连接到第一导电层的焊球形成在第二表面上。
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公开(公告)号：US20120015304A1
公开(公告)日：2012-01-19
申请号：US12837462
申请日：2010-07-15
申请人： Chang-Ming Lee , Wen-Fang Liu , Shih-Jung Huang , Ling-Kai Su
发明人： Chang-Ming Lee , Wen-Fang Liu , Shih-Jung Huang , Ling-Kai Su
CPC分类号： H01L23/49811 , H01L21/4853 , H01L21/486 , H01L23/49827 , H01L2924/0002 , H01L2924/00
摘要： Method for fabricating an interposer is provided. A substrate is provided having thereon at least a conductive via and at least a flange. The flange is bonded on the substrate and shades a portion of the via. A photoresist layer is formed on the interior surface of the via, on a contact surface of the flange and on an inner surface of the flange opposite to the contact surface. An opening is formed in the photoresist layer to expose a portion of the contact surface of the flange, while the photoresist layer still covers the interior surface of the via and the inner surface of the flange. A plating layer is formed on the exposed contact surface of the flange. The photoresist layer is then removed.
摘要翻译： 提供了一种制造插入件的方法。 设置有至少具有导电通孔和至少凸缘的衬底。 法兰结合在基板上并遮蔽通孔的一部分。 在通孔的内表面上，在凸缘的接触表面和与接触表面相对的凸缘的内表面上形成光致抗蚀剂层。 在光致抗蚀剂层中形成开口以暴露凸缘的接触表面的一部分，而光致抗蚀剂层仍然覆盖通孔的内表面和凸缘的内表面。 在凸缘的暴露的接触表面上形成镀层。 然后除去光致抗蚀剂层。
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公开(公告)号：US08318411B2
公开(公告)日：2012-11-27
申请号：US12837462
申请日：2010-07-15
申请人： Chang-Ming Lee , Wen-Fang Liu , Shih-Jung Huang , Ling-Kai Su
发明人： Chang-Ming Lee , Wen-Fang Liu , Shih-Jung Huang , Ling-Kai Su
IPC分类号： G03F7/26
CPC分类号： H01L23/49811 , H01L21/4853 , H01L21/486 , H01L23/49827 , H01L2924/0002 , H01L2924/00
摘要： Method for fabricating an interposer is provided. A substrate is provided having thereon at least a conductive via and at least a flange. The flange is bonded on the substrate and shades a portion of the via. A photoresist layer is formed on the interior surface of the via, on a contact surface of the flange and on an inner surface of the flange opposite to the contact surface. An opening is formed in the photoresist layer to expose a portion of the contact surface of the flange, while the photoresist layer still covers the interior surface of the via and the inner surface of the flange. A plating layer is formed on the exposed contact surface of the flange. The photoresist layer is then removed.
摘要翻译： 提供了一种制造插入件的方法。 设置有至少具有导电通孔和至少凸缘的衬底。 法兰结合在基板上并遮蔽通孔的一部分。 在通孔的内表面上，在凸缘的接触表面和与接触表面相对的凸缘的内表面上形成光致抗蚀剂层。 在光致抗蚀剂层中形成开口以暴露凸缘的接触表面的一部分，而光致抗蚀剂层仍然覆盖通孔的内表面和凸缘的内表面。 在凸缘的暴露的接触表面上形成镀层。 然后除去光致抗蚀剂层。
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公开(公告)号：US08274798B2
公开(公告)日：2012-09-25
申请号：US12845717
申请日：2010-07-28
申请人： Shih-Jung Huang , Wen-Fang Liu , Ling-Kai Su
发明人： Shih-Jung Huang , Wen-Fang Liu , Ling-Kai Su
IPC分类号： H01R9/00
CPC分类号： H05K3/4015 , H05K1/141 , H05K3/3436 , H05K3/368 , H05K3/4007 , H05K2201/0311 , H05K2201/10378
摘要： A carrier substrate includes a substrate having a chip side and a PCB side, a plurality of bond pads disposed on the chip side for bonding a chip, a plurality of land grid array (LGA) pads disposed on the PCB side, and a plurality of resilient flanges installed on the PCB side in an array manner. The plurality of resilient flanges electrically connects with the LGA pads correspondingly.
摘要翻译： 载体基板包括具有芯片侧和PCB侧的基板，设置在芯片侧的用于接合芯片的多个接合焊盘，设置在PCB侧的多个焊盘格栅阵列（LGA）焊盘，以及多个 弹性凸缘以阵列方式安装在PCB侧。 多个弹性凸缘相应地与LGA垫电连接。
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