公开(公告)号：US08756446B2

公开(公告)日：2014-06-17

申请号：US12933229

申请日：2008-04-11

申请人： Vianney Rancurel ,  Vincent Bufferne ,  Gregory Meunier

发明人： Vianney Rancurel ,  Vincent Bufferne ,  Gregory Meunier

IPC分类号： G06F1/00 ,  G06F1/12 ,  G06F13/42 ,  H04L5/00 ,  H04L7/00 ,  G06F1/04 ,  G06F1/14 ,  G06F5/06

CPC分类号： G06F1/3203 ,  G06F1/324 ,  Y02D10/126

摘要： A microprocessor has a low-power mode and a non-low power mode. The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second frequency lower than the first frequency. A hardware timer is present, for scheduling an execution of an event by the microprocessor at a future point in time. The hardware timer is connected to the clock for determining a period of time between a current point in time and a point in time the event based on a number of clock cycles of the clock signal. A timer controller can determine, when the data processing system switches from the low power mode to the non-low power mode, a number of clock cycles of a clock signal with the first frequency that corresponds to a low-power mode period during which the microprocessor has been in the low power mode and adjusting the hardware timer based on the determined number.

摘要翻译： 微处理器具有低功率模式和非低功耗模式。 微处理器包括用于执行提供给微处理器的指令的处理器核心和提供时钟信号的时钟，该时钟信号在非低功率模式中具有第一频率，低功率模式具有低于第一频率的第二频率。 存在硬件定时器，用于在未来的时间点调度微处理器执行事件。 硬件定时器连接到时钟，用于基于时钟信号的时钟周期数来确定当前时间点和事件的时间点之间的时间段。 定时器控制器可以确定当数据处理系统从低功率模式切换到非低功率模式时，具有对应于低功率模式周期的第一频率的时钟信号的数个时钟周期， 微处理器已经处于低功耗模式，并根据确定的数量调整硬件定时器。

公开(公告)号：US20110035613A1

公开(公告)日：2011-02-10

申请号：US12933229

申请日：2008-04-11

申请人： Vianney Rancurel ,  Vincent Bufferne ,  Gregory Meunier

发明人： Vianney Rancurel ,  Vincent Bufferne ,  Gregory Meunier

IPC分类号： G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/324 ,  Y02D10/126

摘要： A microprocessor has a low-power mode and a non-low power mode. The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second frequency lower than the first frequency. A hardware timer is present, for scheduling an execution of an event by the microprocessor at a future point in time. The hardware timer is connected to the clock for determining a period of time between a current point in time and a point in time the event based on a number of clock cycles of the clock signal. A timer controller can determine, when the data processing system switches from the low power mode to the non-low power mode, a number of clock cycles of a clock signal with the first frequency that corresponds to a low-power mode period during which the microprocessor has been in the low power mode and adjusting the hardware timer based on the determined number.

摘要翻译： 微处理器具有低功率模式和非低功耗模式。 微处理器包括用于执行提供给微处理器的指令的处理器核心和提供时钟信号的时钟，该时钟信号在非低功率模式中具有第一频率，低功率模式具有低于第一频率的第二频率。 存在硬件定时器，用于在未来的时间点调度微处理器执行事件。 硬件定时器连接到时钟，用于基于时钟信号的时钟周期数来确定当前时间点和事件的时间点之间的时间段。 定时器控制器可以确定当数据处理系统从低功率模式切换到非低功率模式时，具有对应于低功率模式周期的第一频率的时钟信号的数个时钟周期， 微处理器已经处于低功耗模式，并根据确定的数量调整硬件定时器。