公开(公告)号：US08405126B2

公开(公告)日：2013-03-26

申请号：US13196512

申请日：2011-08-02

申请人： Daisuke Shibata ,  Tatsuo Morita ,  Manabu Yanagihara ,  Yasuhiro Uemoto

发明人： Daisuke Shibata ,  Tatsuo Morita ,  Manabu Yanagihara ,  Yasuhiro Uemoto

IPC分类号： H01L29/778

CPC分类号： H01L29/7783 ,  H01L27/0605 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/7787

摘要： A semiconductor device includes a semiconductor layer stack formed on a substrate, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor layer stack, and are spaced from each other, a first control layer formed between the first ohmic electrode and the second ohmic electrode, and a first gate electrode formed on the first control layer. The first control layer includes a lower layer, an intermediate layer which is formed on the lower layer, and has lower impurity concentration than the lower layer, and an upper layer which is formed on the intermediate layer, and has higher impurity concentration than the intermediate layer.

摘要翻译： 半导体器件包括形成在衬底上的半导体层堆叠，形成在半导体层堆叠上的第一欧姆电极和第二欧姆电极，并且彼此间隔开，形成在第一欧姆电极和第二欧姆电极之间的第一控制层 第二欧姆电极和形成在第一控制层上的第一栅电极。 第一控制层包括下层，形成在下层上的中间层，并且具有比下层更低的杂质浓度，以及形成在中间层上的上层，并且具有比中间层更高的杂质浓度 层。

公开(公告)号：US08299737B2

公开(公告)日：2012-10-30

申请号：US12596770

申请日：2008-12-02

申请人： Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Matsuo Shiraishi ,  Atsushi Morimoto ,  Kouichi Ishikawa

发明人： Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Matsuo Shiraishi ,  Atsushi Morimoto ,  Kouichi Ishikawa

IPC分类号： H02P6/14

CPC分类号： H02M7/53871 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/7787 ,  H02P27/08

摘要： A motor driving circuit includes a three-phase inverter circuit 8, including three upper-arm switching elements 56a to 56c for driving upper arms of different phases of a three-phase motor 3, and three lower-arm switching elements 56d to 56f for driving lower arms of different phases. At least one of the upper-arm switching elements 56a to 56c and the lower-arm switching elements 56d to 56f is a semiconductor element that performs a diode operation. The diode operation is an operation in which a voltage less than or equal to a threshold voltage of a gate electrode G is applied to the gate electrode G with reference to a potential of a first ohmic electrode S, thereby conducting a current flow from the first ohmic electrode S to a second ohmic electrode D and blocking a current flow from the second ohmic electrode D to the first ohmic electrode S.

摘要翻译： 电动机驱动电路包括三相逆变器电路8，其包括用于驱动三相电动机3的不同相的上臂的三个上臂开关元件56a至56c和用于驱动的​​三个下臂开关元件56d至56f 不同阶段的下臂。 上臂开关元件56a至56c和下臂开关元件56d至56f中的至少一个是执行二极管操作的半导体元件。 二极管操作是参照第一欧姆电极S的电位将小于或等于栅电极G的阈值电压的电压施加到栅电极G的操作，从而从第一 欧姆电极S连接到第二欧姆电极D并阻塞从第二欧姆电极D到第一欧姆电极S的电流。

公开(公告)号：US08203376B2

公开(公告)日：2012-06-19

申请号：US12445390

申请日：2007-11-20

申请人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Hiroaki Ueno ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Hiroaki Ueno ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H03K17/687

CPC分类号： H01L29/7787 ,  H01L27/0605 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/432 ,  H01L29/739 ,  H01L29/8124

摘要： A semiconductor device includes a semiconductor layer stack 13 formed on a substrate 11 and having a channel region, a first electrode 16A and a second electrode 16B formed spaced apart from each other on the semiconductor layer stack 13, a first gate electrode 18A formed between the first electrode 16A and the second electrode 16B, and a second gate electrode 18B formed between the first gate electrode 18A and the second electrode 16B. A first control layer 19A having a p-type conductivity is formed between the semiconductor layer stack 13 and the first gate electrode 18A.

摘要翻译： 半导体器件包括形成在衬底11上并具有沟道区的半导体层堆叠13，在半导体层叠层13上彼此隔开形成的第一电极16A和第二电极16B，形成在第一栅电极18A之间的第一栅电极18A 第一电极16A和第二电极16B，以及形成在第一栅电极18A和第二电极16B之间的第二栅电极18B。 在半导体层堆叠13和第一栅电极18A之间形成具有p型导电性的第一控制层19A。

公开(公告)号：US20110284928A1

公开(公告)日：2011-11-24

申请号：US13196512

申请日：2011-08-02

申请人： Daisuke SHIBATA ,  Tatsuo Morita ,  Manabu Yanagihara ,  Yasuhiro Uemoto

发明人： Daisuke SHIBATA ,  Tatsuo Morita ,  Manabu Yanagihara ,  Yasuhiro Uemoto

IPC分类号： H01L29/778 ,  H01L27/06

CPC分类号： H01L29/7783 ,  H01L27/0605 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/7787

摘要： A semiconductor device includes a semiconductor layer stack formed on a substrate, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor layer stack, and are spaced from each other, a first control layer formed between the first ohmic electrode and the second ohmic electrode, and a first gate electrode formed on the first control layer. The first control layer includes a lower layer, an intermediate layer which is formed on the lower layer, and has lower impurity concentration than the lower layer, and an upper layer which is formed on the intermediate layer, and has higher impurity concentration than the intermediate layer.

摘要翻译： 半导体器件包括形成在衬底上的半导体层堆叠，形成在半导体层堆叠上的第一欧姆电极和第二欧姆电极，并且彼此间隔开，形成在第一欧姆电极和第二欧姆电极之间的第一控制层 第二欧姆电极和形成在第一控制层上的第一栅电极。 第一控制层包括下层，形成在下层上的中间层，并且具有比下层更低的杂质浓度，以及形成在中间层上的上层，并且具有比中间层更高的杂质浓度 层。

公开(公告)号：US20110248337A1

公开(公告)日：2011-10-13

申请号：US13067692

申请日：2011-06-21

申请人： Tatsuo Morita ,  Tetsuzo Ueda

发明人： Tatsuo Morita ,  Tetsuzo Ueda

IPC分类号： H01L29/78

CPC分类号： H01L21/28581 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/42316 ,  H01L29/475 ,  H01L29/7786

摘要： A material of a gate electrode is a conductive oxide having a higher work function than that of conventionally used Pd and so on, thereby achieving a normally-off transistor without reducing the sheet carrier concentration of a heterojunction. It is thus possible to achieve a normally-off operation while reducing an increase in the specific on-state resistance.

摘要翻译： 栅电极的材料是具有比常规使用的Pd等功函数高的导电氧化物，从而在不降低异质结的片载体浓度的情况下实现常关晶体管。 因此，可以在减小特定导通电阻的增加的同时实现常关断操作。

公开(公告)号：US20100213503A1

公开(公告)日：2010-08-26

申请号：US12681567

申请日：2009-07-10

申请人： Manabu Yanagihara ,  Kazushi Nakazawa ,  Tatsuo Morita ,  Yasuhiro Uemoto

发明人： Manabu Yanagihara ,  Kazushi Nakazawa ,  Tatsuo Morita ,  Yasuhiro Uemoto

IPC分类号： H01L29/747

CPC分类号： H01L27/088 ,  H01L23/481 ,  H01L23/4824 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/42316 ,  H01L29/475 ,  H01L29/7786 ,  H01L2924/0002 ,  H01L2924/00

摘要： A bidirectional switch includes a plurality of unit cells 11 including a first ohmic electrode 15, a first gate electrode 17, a second gate electrode 18, and a second ohmic electrode 16. The first gate electrodes 15 are electrically connected via a first interconnection 31 to a first gate electrode pad 43. The second gate electrodes 18 are electrically connected via a second interconnection 32 to a second gate electrode pad 44. A unit cell 11 including a first gate electrode 17 having the shortest interconnect distance from the first gate electrode pad 43 includes a second gate electrode 18 having the shortest interconnect distance from the second gate electrode pad 44.

摘要翻译： 双向开关包括多个单元电池11，其包括第一欧姆电极15，第一栅极电极17，第二栅极电极18和第二欧姆电极16.第一栅电极15经由第一互连线31电连接到 第一栅极电极焊盘43.第二栅电极18经由第二互连32电连接到第二栅极电极焊盘44.单元电池11包括与第一栅电极焊盘43的布线距离最短的第一栅电极17 包括与第二栅电极焊盘44的互连距离最短的第二栅电极18。

公开(公告)号：US20090166677A1

公开(公告)日：2009-07-02

申请号：US12329939

申请日：2008-12-08

申请人： Daisuke SHIBATA ,  Tatsuo Morita ,  Manabu Yanagihara ,  Yasuhiro Uemoto

发明人： Daisuke SHIBATA ,  Tatsuo Morita ,  Manabu Yanagihara ,  Yasuhiro Uemoto

IPC分类号： H01L21/338 ,  H01L29/812

CPC分类号： H01L29/7783 ,  H01L21/26533 ,  H01L21/743 ,  H01L21/76251 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0629 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/7781 ,  H01L29/861 ,  H01L29/872

摘要： A semiconductor device includes: a semiconductor substrate; a diode having a cathode formed on a first surface side of the semiconductor substrate and an anode formed on a second surface side of the semiconductor substrate; and a transistor formed over the semiconductor substrate. The transistor includes a semiconductor layer laminate formed over the semiconductor substrate, a source electrode and a drain electrode that are formed spaced apart from each other over the semiconductor layer laminate, and a gate electrode formed between the source electrode and the drain electrode. The source electrode is electrically connected to the anode, and the drain electrode is electrically connected to the cathode.

摘要翻译： 半导体器件包括：半导体衬底; 具有形成在半导体衬底的第一表面侧的阴极和形成在半导体衬底的第二表面侧上的阳极的二极管; 以及形成在半导体衬底上的晶体管。 晶体管包括形成在半导体衬底上的半导体层叠层，在半导体层叠层上彼此隔开形成的源电极和漏极，以及形成在源电极和漏电极之间的栅电极。 源电极与阳极电连接，漏电极与阴极电连接。

公开(公告)号：US20070258054A1

公开(公告)日：2007-11-08

申请号：US11822588

申请日：2007-07-09

申请人： Takeshi Katayama ,  Hideharu Saito ,  Keiichiro Tokushige ,  Tatsuo Morita

发明人： Takeshi Katayama ,  Hideharu Saito ,  Keiichiro Tokushige ,  Tatsuo Morita

IPC分类号： G03B21/16

CPC分类号： F21V15/01 ,  G02F1/13 ,  G02F1/1333 ,  G03B21/00 ,  G03B21/16

摘要： Reduction of noise is achieved by devising an arrangement of heat generating parts such as a light valve element, an electric power source, a light source, etc. and an arrangement of cooling fans. In cooling the light source, the electric power source and liquid crystal panels, a cooling wind path for the liquid crystal panels and the electric power source is made separate from and independent of a cooling wind path for the light source that generates much heat, a cooling air volume is optimized for the respective cooling wind paths, and noise accompanying the rotation of the cooling fans is reduced. Also, by arranging the cooling fans substantially centrally of the respective cooling wind paths, that volume of noise, which leaks from air intake ports and air exhaust port that are opened to a housing of a unit, is reduced.

公开(公告)号：US20070205407A1

公开(公告)日：2007-09-06

申请号：US11712482

申请日：2007-03-01

申请人： Hisayoshi Matsuo ,  Tatsuo Morita ,  Tetsuzo Ueda ,  Daisuke Ueda

发明人： Hisayoshi Matsuo ,  Tatsuo Morita ,  Tetsuzo Ueda ,  Daisuke Ueda

IPC分类号： H01L29/06

CPC分类号： H01L29/045 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/7787 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/04 ,  H01L33/12

摘要： A nitride semiconductor device includes a semiconductor stacked structure which is formed of a nitride semiconductor having a first principal surface and a second principal surface opposed to the first principal surface and which includes an active layer. The first principal surface of the semiconductor stacked structure is formed with a plurality of indentations whose plane orientations are the {0001} plane, and the plane orientation of the second principal surface is the {1-101} plane. The active layer is formed along the {1-101} plane.

摘要翻译： 氮化物半导体器件包括半导体层叠结构，其由具有第一主表面和与第一主表面相对并包括有源层的第二主表面的氮化物半导体形成。 半导体堆叠结构的第一主表面形成有多个平面取向为{0001}面并且第二主面的平面取向为{1-101}面的凹陷。 有源层沿{1-101}面形成。

公开(公告)号：US07252416B2

公开(公告)日：2007-08-07

申请号：US10802028

申请日：2004-03-17

申请人： Takeshi Katayama ,  Hideharu Saito ,  Keiichiro Tokushige ,  Tatsuo Morita

发明人： Takeshi Katayama ,  Hideharu Saito ,  Keiichiro Tokushige ,  Tatsuo Morita

IPC分类号： F21V29/02

CPC分类号： F21V15/01 ,  G02F1/13 ,  G02F1/1333 ,  G03B21/00 ,  G03B21/16

摘要： Reduction of noise is achieved by devising an arrangement of heat generating parts such as a light valve element, an electric power source, a light source, etc. and an arrangement of cooling fans. In cooling the light source, the electric power source and liquid crystal panels, a cooling wind path for the liquid crystal panels and the electric power source is made separate from and independent of a cooling wind path for the light source that generates much heat, a cooling air volume is optimized for the respective cooling wind paths, and noise accompanying the rotation of the cooling fans is reduced. Also, by arranging the cooling fans substantially centrally of the respective cooling wind paths, that volume of noise, which leaks from air intake ports and air exhaust port that are opened to a housing of a unit, is reduced.

摘要翻译： 通过设计诸如光阀元件，电源，光源等的发热部件的布置和冷却风扇的布置来实现噪声的降低。 在冷却光源时，电源和液晶面板，用于液晶面板和电源的冷却风路被分离并且独立于产生大量热量的光源的冷却风路， 针对相应的冷却风路优化了冷却风量，并且降低伴随着冷却风扇旋转的噪音。 此外，通过将冷却风扇基本上布置在相应的冷却风路的中央，减小了从对单元的壳体开放的进气口和排气口泄漏的噪声的体积。