公开(公告)号：US09177055B2

公开(公告)日：2015-11-03

申请号：US12446215

申请日：2007-10-12

Applicant: Moon-Sung Choi ,  Man-Jin Han ,  Tae-Kyun Kim

Inventor： Moon-Sung Choi ,  Man-Jin Han ,  Tae-Kyun Kim

IPC: G06Q30/02 ,  G06F17/30 ,  G06F17/21 ,  G06Q10/10 ,  G06F17/24

CPC classification number: G06F17/30864 ,  G06F17/211 ,  G06F17/241 ,  G06Q10/10 ,  G06Q30/0254 ,  G06Q30/0277

Abstract: A system for displaying and managing information on a webpage using an indicator comprises an indicator displayed on a surface of specific contents of the webpage with reference to coordinate values corresponding to the specific contents and for classifying and elaborating on the specific contents; an indicator generation module for generating the indicator comprising a block setting portion for predicting a width of the specific contents, a coordinate setting portion for grasping the coordinate value of a webpage area corresponding to the specific contents, an input portion for inputting information to be recorded in the indicator, a storage portion for storing the coordinate value and an output portion for outputting the indicator to the specific contents based on the information stored in the storage portion; and an indicator database stored in the system server through the storage portion and collected according to a specific classification.

Abstract translation: 使用指示器在网页上显示和管理信息的系统包括：参照与特定内容对应的坐标值，在网页的特定内容的表面上显示的指示符，并对特定内容进行分类和阐述; 用于产生指示器的指示器生成模块，包括用于预测特定内容的宽度的块设置部分，用于掌握与特定内容相对应的网页区域的坐标值的坐标设置部分，用于输入要记录的信息的输入部分 在指示器中，存储用于存储坐标值的存储部分和用于基于存储在存储部分中的信息将指示符输出到特定内容的输出部分; 以及通过存储部存储在系统服务器中的指示符数据，并根据特定分类收集。

公开(公告)号：US20140048841A1

公开(公告)日：2014-02-20

申请号：US14009882

申请日：2012-03-30

Applicant: Tae-Kyun Kim ,  Yeong-Chool Yu

Inventor： Tae-Kyun Kim ,  Yeong-Chool Yu

IPC: H01L33/64

CPC classification number: H01L33/64 ,  C08K3/04 ,  C08K5/0066 ,  C08K5/34928 ,  C08L77/00 ,  C08L77/06 ,  C09K21/12 ,  H05B33/20

Abstract: The present invention relates to a composition based on a polyamide matrix having a high thermal conductivity and comprising specific proportions of alumina and of graphite and also a flame-retardant system. This composition may in particular be used for producing components for lighting devices comprising light-emitting diodes.

Abstract translation: 本发明涉及一种基于聚酰胺基体的组合物，其具有高导热性并且包含特定比例的氧化铝和石墨以及阻燃体系。 该组合物特别可用于制造包括发光二极管的照明装置的部件。

公开(公告)号：US08497724B2

公开(公告)日：2013-07-30

申请号：US13332063

申请日：2011-12-20

Applicant: Tae-Kyun Kim

Inventor： Tae-Kyun Kim

IPC: H03H11/26

CPC classification number: H03K5/135

Abstract: A delay circuit includes a delay unit configured to delay a reference input signal and generate a reference output signal and a storage unit configured to store a plurality of input signals in response to the reference input signal and output the stored signals in response to the reference output signal.

Abstract translation: 延迟电路包括：延迟单元，被配置为延迟参考输入信号并产生参考输出信号;以及存储单元，配置为响应于参考输入信号存储多个输入信号，并响应于参考输出输出所存储的信号 信号。

公开(公告)号：US08427218B2

公开(公告)日：2013-04-23

申请号：US12832470

申请日：2010-07-08

Applicant: Tae-Kyun Kim

Inventor： Tae-Kyun Kim

IPC: H03K3/00

CPC classification number: H03H11/265 ,  H03K5/05 ,  H03K5/1534 ,  H03K2005/00293 ,  H03L7/06

Abstract: A delay circuit includes a pulse generation unit configured to generate a pulse signal, which is activated in response to an input signal and has a pulse width corresponding to delay information, and an output unit configured to activate a final output signal in response to a deactivation of the pulse signal.

Abstract translation: 延迟电路包括：脉冲发生单元，被配置为产生响应于输入信号被激活并具有对应于延迟信息的脉冲宽度的脉冲信号;以及输出单元，被配置为响应于去激活而激活最终输出信号 的脉冲信号。

公开(公告)号：US08399342B2

公开(公告)日：2013-03-19

申请号：US13080415

申请日：2011-04-05

Applicant: Tae-Kyun Kim

Inventor： Tae-Kyun Kim

IPC: H01L21/265

CPC classification number: H01L27/10885

Abstract: A method for fabricating a semiconductor device includes forming a plurality of bodies isolated by trenches by etching a substrate, forming a buried bit line gap-filling a portion of each trench, forming an etch stop layer on an upper surface of the buried bit line; and forming a word line extended in a direction crossing the buried bit line over the etch stop layer.

Abstract translation: 一种制造半导体器件的方法包括通过蚀刻衬底形成由沟槽隔离的多个体，形成掩埋位线间隙，填充每个沟槽的一部分，在掩埋位线的上表面上形成蚀刻停止层; 以及形成在蚀刻停止层上的与掩埋位线交叉的方向上延伸的字线。

公开(公告)号：US08237706B2

公开(公告)日：2012-08-07

申请号：US12348355

申请日：2009-01-05

Applicant: Suh-Ho Lee ,  Soo-Kyun Kim ,  Joo-Kwang Kim ,  Tae-Kyun Kim

Inventor： Suh-Ho Lee ,  Soo-Kyun Kim ,  Joo-Kwang Kim ,  Tae-Kyun Kim

IPC: G06T17/00 ,  G06T15/00 ,  G09G5/00

CPC classification number: G06T17/20

Abstract: An apparatus and method for simplifying 3-Dimensional (3D) mesh data are disclosed. The method includes measuring discrete curvature at each point of received 3D mesh data, calculating an error based on distance-curvature error metrics including the discrete curvature, first sorting a low curvature one of the calculated error values in a heap in ascending order, selecting a minimum error among the calculated errors, determining if the minimum error is less than a threshold, contracting an edge if the selected minimum error is greater than the threshold, and recalculating an error of a surface neighboring to a surface on which the contracted edge belongs and re-sorting the calculated error values.

Abstract translation: 公开了一种用于简化三维（3D）网格数据的装置和方法。 该方法包括测量接收的3D网格数据的每个点处的离散曲率，基于包括离散曲率的距离 - 曲率误差度量来计算误差，首先按照升序排列堆中计算出的误差值的低曲率， 计算误差中的最小误差，确定最小误差是否小于阈值，如果所选择的最小误差大于阈值则缩小边缘，并且重新计算与合同边缘所属的表面相邻的表面的误差， 重新排序计算出的错误值。

公开(公告)号：US20120119357A1

公开(公告)日：2012-05-17

申请号：US13166118

申请日：2011-06-22

Applicant: Sang Jin Byeon ,  Tae Kyun Kim

Inventor： Sang Jin Byeon ,  Tae Kyun Kim

IPC: H01L23/48 ,  H01L23/498

CPC classification number: H01L25/0657 ,  G11C5/02 ,  G11C5/06 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05569 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2225/06544 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

Abstract: A semiconductor apparatus having stacked first and second chips includes a first through line of the first chip configured to receive a first coding signal and be electrically connected to a first through line of the second chip; a second through line of the first chip configured to receive a second coding signal; and a second through line of the second chip configured to be electrically connected to the first through line of the first chip and receive the first coding signal.

Abstract translation: 具有堆叠的第一和第二芯片的半导体装置包括：第一芯片的第一直线，被配置为接收第一编码信号并与第二芯片的第一直线电连接; 所述第一芯片的第二直线被配置为接收第二编码信号; 以及第二芯片的第二直线，被配置为电连接到第一芯片的第一直线并接收第一编码信号。

公开(公告)号：US20100285642A1

公开(公告)日：2010-11-11

申请号：US12558215

申请日：2009-09-11

Applicant: Kyoung Bong Rouh ,  Yun Hyuck Ji ,  Tae Kyun Kim ,  Woo Sung Kim ,  Seung Mi Lee

Inventor： Kyoung Bong Rouh ,  Yun Hyuck Ji ,  Tae Kyun Kim ,  Woo Sung Kim ,  Seung Mi Lee

IPC: H01L21/8238

CPC classification number: H01L21/823842

Abstract: A method of doping impurity ions in a dual gate includes doping first conductivity type impurity ions in a gate conductive layer over a semiconductor substrate having a first region and a second region, wherein the doping is performed with a concentration gradient so that a doping concentration in an upper portion of the gate conductive layer is higher than that in a lower portion; doping second conductivity type impurity ions in a portion of the gate conductive layer in the second region using a mask for opening the portion of the gate conductive layer in the second region; and diffusing the first conductivity type impurity ions and the second conductivity type impurity ions by performing heat treatment.

Abstract translation: 在双栅极中掺杂杂质离子的方法包括在具有第一区域和第二区域的半导体衬底上的栅极导电层中掺杂第一导电型杂质离子，其中以浓度梯度进行掺杂，使得掺杂浓度 栅极导电层的上部比下部高; 在第二区域中的栅极导电层的一部分中掺杂第二导电型杂质离子，使用掩模，用于在第二区域中打开栅极导电层的部分; 并通过进行热处理使第一导电型杂质离子和第二导电型杂质离子扩散。

公开(公告)号：US20100156487A1

公开(公告)日：2010-06-24

申请号：US12431875

申请日：2009-04-29

Applicant: Tae Kyun KIM

Inventor： Tae Kyun KIM

IPC: H03L7/06 ,  H03K3/017 ,  H03L7/00

CPC classification number: H03L7/0814 ,  H03K5/1565 ,  H03K2005/00026 ,  H03K2005/0011 ,  H03K2005/00208

Abstract: A delay locked loop (DLL) circuit includes a clock input buffer that generates a reference clock signal by buffering an external clock signal and outputs the reference clock signal by correcting a duty cycle of the reference clock signal in response to a duty cycle control signal. The DLL circuit also includes a timing compensation unit configured that generates a compensation reference clock signal by compensating for a toggle timing of the reference clock signal that is changed during the duty cycle correction operation in response to a timing control signal. The DLL circuit further includes and a duty cycle control unit that generates the duty cycle control signal and the timing control signal by detecting the duty cycle of the reference clock signal.

Abstract translation: 延迟锁定环（DLL）电路包括时钟输入缓冲器，其通过缓冲外部时钟信号产生参考时钟信号，并通过响应于占空比控制信号校正参考时钟信号的占空比来输出参考时钟信号。 该DLL电路还包括定时补偿单元，该定时补偿单元被配置为通过补偿在占空比校正操作期间响应于定时控制信号而改变的参考时钟信号的触发定时来产生补偿参考时钟信号。 该DLL电路还包括一个占空比控制单元，其通过检测基准时钟信号的占空比来产生占空比控制信号和定时控制信号。

公开(公告)号：US20090174732A1

公开(公告)日：2009-07-09

申请号：US12211303

申请日：2008-09-16

Applicant: Young-woo Lee ,  Tae-kyun Kim ,  Sung-bin Kuk

Inventor： Young-woo Lee ,  Tae-kyun Kim ,  Sung-bin Kuk

IPC: G09G5/02

CPC classification number: G09G3/20 ,  G06F17/212 ,  G06T11/60 ,  G09G5/005 ,  G09G2340/0407 ,  G09G2340/0464 ,  G09G2340/145 ,  G09G2380/14 ,  H04N21/4126 ,  H04N21/4312 ,  H04N21/4858

Abstract: An image display controlling apparatus and method, which can automatically divide an image signal according to the size of a screen in a mobile terminal. The image display controlling method includes generating frames having inner and outer edges based on an image signal; measuring a ratio of the size of each generated frame to the size of a display area; adjusting a number of frames to be displayed on the display area according to the measured ratio; and displaying a frame image corresponding to the adjusted number of frames on the display area.

Abstract translation: 一种图像显示控制装置和方法，其可以根据移动终端中的屏幕的大小自动划分图像信号。 图像显示控制方法包括基于图像信号生成具有内边缘和外边缘的帧; 测量每个生成的帧的大小与显示区域的大小的比率; 根据测量的比例调整显示在显示区域上的帧数; 以及在所述显示区域上显示与所述经调整的帧数对应的帧图像。