公开(公告)号：US5252848A

公开(公告)日：1993-10-12

申请号：US829190

申请日：1992-02-03

Applicant: Steven J. Adler ,  Robert B. Davies ,  Stephen J. Nugent ,  Hassan Pirastehfar

Inventor： Steven J. Adler ,  Robert B. Davies ,  Stephen J. Nugent ,  Hassan Pirastehfar

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/402 ,  H01L29/1045 ,  H01L29/1087 ,  H01L29/4175 ,  H01L29/41775 ,  H01L29/7813 ,  H01L29/7835

Abstract: A performance enhancing conductor (27) is employed to reduce a transistor's (10) on resistance and to also reduce the transistor's (10) parasitic gate to drain capacitance (32). The performance enhancing conductor (27) covers the transistor's (10) gate (22) and a portion of the drain region (18, 19) that is adjacent the transistor's channel (20). The performance enhancing conductor (27) is isolated from the gate (22) by an insulator (24, 26).

Abstract translation: 使用性能增强导体（27）来减小晶体管（10）导通电阻并且还将晶体管（10）的寄生栅极减小到漏极电容（32）。 性能增强导体（27）覆盖晶体管（10）栅极（22）和与晶体管通道（20）相邻的漏极区域（18,19）的一部分。 性能增强导体（27）通过绝缘体（24,26）与栅极（22）隔离。