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公开(公告)号：US07948783B2
公开(公告)日：2011-05-24
申请号：US12515898
申请日：2007-11-12
Applicant: Tadahiko Sugibayashi , Takeshi Honda , Noboru Sakimura , Nobuyuki Ishiwata , Shuichi Tahara
Inventor： Tadahiko Sugibayashi , Takeshi Honda , Noboru Sakimura , Nobuyuki Ishiwata , Shuichi Tahara
IPC: G11C15/02
CPC classification number: H01L27/228 , B82Y10/00 , B82Y25/00 , G11C11/161 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , H01F10/3254 , H01F10/3272 , H01L43/08
Abstract: An MRAM comprises: a plurality of magnetic memory cells each having a magnetoresistive element; and a magnetic field application section. The magnetic field application section applies an offset adjustment magnetic field in a certain direction to the plurality of magnetic memory cells from outside the plurality of magnetic memory cells. Respective data stored in the plurality of magnetic memory cells become the same when the offset adjustment magnetic field is removed.
Abstract translation: MRAM包括：多个具有磁阻元件的磁存储单元; 和磁场施加部。 磁场施加部从多个磁存储单元的外部向多个磁存储单元施加一定方向的偏移调整磁场。 当去除偏移调整磁场时，存储在多个磁存储单元中的各个数据变得相同。
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公开(公告)号：US06320369B1
公开(公告)日：2001-11-20
申请号：US09413536
申请日：1999-10-06
Applicant: Mutsuo Hidaka , Shuichi Tahara
Inventor： Mutsuo Hidaka , Shuichi Tahara
IPC: G01R3300
CPC classification number: G01R33/0354
Abstract: A superconducting current measuring circuit is provided with a detection loop through which a current flows by the influence of a magnetic field generated by a measurement target current. The detection loop contains a superconductor. The superconducting current measuring circuit is also provided with a superconducting sampler circuit for measuring the current flowing through the detection loop.
Abstract translation: 超导电流测量电路设置有检测回路，电流通过测量目标电流产生的磁场的影响而流动。 检测回路包含超导体。 超导电流测量电路还设置有用于测量流过检测环路的电流的超导采样器电路。
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公开(公告)号：US4603263A
公开(公告)日：1986-07-29
申请号：US468908
申请日：1983-02-23
Applicant: Shuichi Tahara , Jun'ichi Sone
Inventor： Shuichi Tahara , Jun'ichi Sone
IPC: H03K3/38
CPC classification number: H03K3/38 , Y10S505/864
Abstract: A Josephson pulse generator of the current injection type is composed of a first group of N (N.gtoreq.2) resistors, one end of each being connected together, the other ends of two of the N resistors being connected to first and second nodes. A second group of serially connected N-1 resistors is connected between the first and second nodes and to the other ends of the N-2 resistors in the first group not connected to the first and second nodes. N Josephson junctions are each connected between a reference potential and the other end of a different one of the N resistors. Two additional Josephson junctions, each having one end thereof connected, respectively, to the first node and the second node is provided along with an additional resistor connected between the other end of the Josephson junction connected to the first node and the reference potential.
Abstract translation: 电流注入型约瑟夫森脉冲发生器由第一组N（N> / = 2）电阻组成，其中一端连接在一起，其中两个N电阻的另一端连接到第一和第二节点 。 第二组串联N-1电阻器连接在第一和第二节点之间，并连接到第一组中不连接到第一和第二节点的N-2电阻器的另一端。 N个约瑟夫逊结各自连接在参考电位和不同N个电阻器的另一端之间。 两个附加的约瑟夫逊结，其一端分别连接到第一节点和第二节点以及连接在连接到第一节点的约瑟夫逊结的另一端和参考电位之间的附加电阻器。
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公开(公告)号：US20100046284A1
公开(公告)日：2010-02-25
申请号：US12515898
申请日：2007-11-12
Applicant: Tadahiko Sugibayshi , Takeshi Honda , Noboru Sakimura , Nobuyuki Ishiwata , Shuichi Tahara
Inventor： Tadahiko Sugibayshi , Takeshi Honda , Noboru Sakimura , Nobuyuki Ishiwata , Shuichi Tahara
CPC classification number: H01L27/228 , B82Y10/00 , B82Y25/00 , G11C11/161 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , H01F10/3254 , H01F10/3272 , H01L43/08
Abstract: An MRAM comprises: a plurality of magnetic memory cells each having a magnetoresistive element; and a magnetic field application section. The magnetic field application section applies an offset adjustment magnetic field in a certain direction to the plurality of magnetic memory cells from outside the plurality of magnetic memory cells. Respective data stored in the plurality of magnetic memory cells become the same when the offset adjustment magnetic field is removed.
Abstract translation: MRAM包括：多个具有磁阻元件的磁存储单元; 和磁场施加部。 磁场施加部从多个磁存储单元的外部向多个磁存储单元施加一定方向的偏移调整磁场。 当去除偏移调整磁场时，存储在多个磁存储单元中的各个数据变得相同。
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