ACS unit of a Viterbi decoder and method for calculating a bit error rate before a Viterbi decoder
    1.
    发明授权
    ACS unit of a Viterbi decoder and method for calculating a bit error rate before a Viterbi decoder 有权
    维特比解码器的ACS单元和用于计算维特比解码器之前的误码率的方法

    公开(公告)号:US08140949B2

    公开(公告)日:2012-03-20

    申请号:US11938788

    申请日:2007-11-13

    IPC分类号: H03M13/03 G06F11/00 H04L27/06

    摘要: An ACS unit of a Viterbi decoder and a method for calculating the bit error rate (BER) before Viterbi decoder are provided. The ACS unit includes a state calculator and a BER calculator. The state calculator calculates the state metric of a corresponding target state in the trellis diagram and selects one of two candidate source states as the selected source state of the target state. The state calculator also provides a selection signal indicating the selected source state. The BER calculator is coupled to the state calculator for providing the sum of the BER of the selected source state and the bit error count (BEC) of the transition from the selected source state to the target state as the BER of the target state.

    摘要翻译: 提供维特比解码器的ACS单元和用于计算维特比解码器之前的误码率(BER)的方法。 ACS单元包括状态计算器和BER计算器。 状态计算器计算网格图中相应目标状态的状态度量,并且选择两个候选源状态中的一个作为目标状态的所选源状态。 状态计算器还提供指示所选择的源状态的选择信号。 BER计算器耦合到状态计算器,用于提供所选择的源状态的BER和从所选择的源状态到目标状态的转换的位错误计数(BEC)的和作为目标状态的BER。

    NULL DETECTOR AND METHOD THEREOF
    2.
    发明申请
    NULL DETECTOR AND METHOD THEREOF 有权
    空检测器及其方法

    公开(公告)号:US20090036071A1

    公开(公告)日:2009-02-05

    申请号:US11829978

    申请日:2007-07-30

    IPC分类号: H01Q11/12

    CPC分类号: H01Q3/2611

    摘要: A null detector and its corresponding method are provided. The null detector includes a power detector, a smoother, and an overlapper. The power detector outputs a power level signal according to the power level of a received signal. The smoother is coupled to the power detector for determining according to the power level signal whether the received signal is transmitting a null symbol, and then the smoother outputs a null detection signal at a first state value or a second state value indicating the result of the determination. The overlapper is coupled to the smoother for providing the duration and position of the null symbols transmitted by the received signal according to the null detection signal.

    摘要翻译: 提供了空检测器及其相应的方法。 空检测器包括功率检测器,更平滑器和重叠器。 功率检测器根据接收信号的功率电平输出功率电平信号。 平滑器耦合到功率检测器,用于根据功率电平信号确定接收到的信号是否正在发送零符号,然后平滑器以第一状态值或第二状态值输出指示结果的结果的空值检测信号 决心。 叠加器耦合到平滑器,用于根据零检测信号提供由接收信号发送的空符号的持续时间和位置。

    VARIABLE LENGTH FFT APPARATUS AND METHOD THEREOF
    3.
    发明申请
    VARIABLE LENGTH FFT APPARATUS AND METHOD THEREOF 审中-公开
    可变长度FFT装置及其方法

    公开(公告)号:US20080320069A1

    公开(公告)日:2008-12-25

    申请号:US11766783

    申请日:2007-06-21

    IPC分类号: G06F15/00

    CPC分类号: G06F17/142

    摘要: The invention discloses a variable length FFT apparatus and a method thereof. The FFT apparatus includes a split-radix based FFT unit and a multiplexing unit. The split-radix based FFT unit has a plurality of processing elements cascaded in a series. The multiplexing unit is coupled to the split-radix based FFT unit, and is for selectively bypassing at least one of the processing elements according to the size of input data when the split-radix based FFT unit performs the FFT computation on the input data. The FFT apparatus of the present invention therefore has a simple structure and is flexible for any FFT size.

    摘要翻译: 本发明公开了一种可变长度FFT装置及其方法。 FFT装置包括基于分组的FFT单元和复用单元。 基于分组的FFT单元具有串联级联的多个处理元件。 复用单元耦合到基于分组基的FFT单元,并且用于当基于分组的FFT单元对输入数据执行FFT计算时,根据输入数据的大小选择性地旁路至少一个处理单元。 因此,本发明的FFT装置具有简单的结构,对于任何FFT大小都是灵活的。

    Time domain symbol timing synchronization circuit and method thereof for communication systems
    4.
    发明授权
    Time domain symbol timing synchronization circuit and method thereof for communication systems 有权
    时域符号定时同步电路及其通信系统的方法

    公开(公告)号:US07742537B2

    公开(公告)日:2010-06-22

    申请号:US11829089

    申请日:2007-07-27

    IPC分类号: H04K1/10 H04L27/28

    摘要: A time domain symbol timing synchronization circuit is disclosed, which comprises: an autocorrelation function calculator for calculating cyclic prefix autocorrelation functions and an offset time estimator for searching peak positions of cyclic prefix autocorrelation functions to indicate symbol boundary of received communication symbols. The offset time estimator compares a current peak position and a previous peak position. If (a) the difference of the positions is larger than a threshold and (b) the current peak is smaller than a reference average peak, the current peak is determined as false; the offset time estimator weeds out and replaces the current peak position by the previous peak position; and the current peak is not introduced in the reference average peak calculation.

    摘要翻译: 公开了一种时域符号定时同步电路,其包括:用于计算循环前缀自相关函数的自相关函数计算器和用于搜索循环前缀自相关函数的峰值位置以指示接收的通信符号的符号边界的偏移时间估计器。 偏移时间估计器将当前峰值位置与先前的峰值位置进行比较。 如果(a)位置差大于阈值,并且(b)电流峰值小于参考平均峰值,则将电流峰值确定为假; 偏移时间估计器除去并将当前峰值位置替换为先前的峰值位置; 并且在参考平均峰值计算中不引入当前峰值。

    ACS UNIT OF A VITERBI DECODER AND METHOD FOR CALCULATING A BIT ERROR RATE BEFORE A VITERBI DECODER
    5.
    发明申请
    ACS UNIT OF A VITERBI DECODER AND METHOD FOR CALCULATING A BIT ERROR RATE BEFORE A VITERBI DECODER 有权
    VITERBI解码器的ACS单元和在VITERBI解码器之前计算位错误率的方法

    公开(公告)号:US20090125794A1

    公开(公告)日:2009-05-14

    申请号:US11938788

    申请日:2007-11-13

    IPC分类号: H03M13/41 G06F11/00

    摘要: An ACS unit of a Viterbi decoder and a method for calculating the bit error rate (BER) before Viterbi decoder are provided. The ACS unit includes a state calculator and a BER calculator. The state calculator calculates the state metric of a corresponding target state in the trellis diagram and selects one of two candidate source states as the selected source state of the target state. The state calculator also provides a selection signal indicating the selected source state. The BER calculator is coupled to the state calculator for providing the sum of the BER of the selected source state and the bit error count (BEC) of the transition from the selected source state to the target state as the BER of the target state.

    摘要翻译: 提供维特比解码器的ACS单元和用于计算维特比解码器之前的误码率(BER)的方法。 ACS单元包括状态计算器和BER计算器。 状态计算器计算网格图中相应目标状态的状态度量,并且选择两个候选源状态中的一个作为目标状态的所选源状态。 状态计算器还提供指示所选择的源状态的选择信号。 BER计算器耦合到状态计算器,用于提供所选择的源状态的BER和从所选择的源状态到目标状态的转换的位错误计数(BEC)的和作为目标状态的BER。

    Null detector and method thereof
    6.
    发明授权
    Null detector and method thereof 有权
    空探测器及其方法

    公开(公告)号:US07873123B2

    公开(公告)日:2011-01-18

    申请号:US11829978

    申请日:2007-07-30

    IPC分类号: H04L25/06 H04L27/22 H04L25/10

    CPC分类号: H01Q3/2611

    摘要: A null detector and its corresponding method are provided. The null detector includes a power detector, a smoother, and an overlapper. The power detector outputs a power level signal according to the power level of a received signal. The smoother is coupled to the power detector for determining according to the power level signal whether the received signal is transmitting a null symbol, and then the smoother outputs a null detection signal at a first state value or a second state value indicating the result of the determination. The overlapper is coupled to the smoother for providing the duration and position of the null symbols transmitted by the received signal according to the null detection signal.

    摘要翻译: 提供了空检测器及其相应的方法。 空检测器包括功率检测器,更平滑器和重叠器。 功率检测器根据接收信号的功率电平输出功率电平信号。 平滑器耦合到功率检测器,用于根据功率电平信号确定接收到的信号是否正在发送零符号,然后平滑器以第一状态值或第二状态值输出指示结果的结果的空值检测信号 决心。 叠加器耦合到平滑器,用于根据零检测信号提供由接收信号发送的空符号的持续时间和位置。

    TIME DOMAIN SYMBOL TIMING SYNCHRONIZATION CIRCUIT AND METHOD THEREOF FOR COMMUNICATION SYSTEMS
    7.
    发明申请
    TIME DOMAIN SYMBOL TIMING SYNCHRONIZATION CIRCUIT AND METHOD THEREOF FOR COMMUNICATION SYSTEMS 有权
    时域同步时序同步电路及其通信系统的方法

    公开(公告)号:US20090028254A1

    公开(公告)日:2009-01-29

    申请号:US11829089

    申请日:2007-07-27

    IPC分类号: H04L27/28

    摘要: A time domain symbol timing synchronization circuit is disclosed, which comprises: an autocorrelation function calculator for calculating cyclic prefix autocorrelation functions and an offset time estimator for searching peak positions of cyclic prefix autocorrelation functions to indicate symbol boundary of received communication symbols. The offset time estimator compares a current peak position and a previous peak position. If (a) the difference of the positions is larger than a threshold and (b) the current peak is smaller than a reference average peak, the current peak is determined as false; the offset time estimator weeds out and replaces the current peak position by the previous peak position; and the current peak is not introduced in the reference average peak calculation.

    摘要翻译: 公开了一种时域符号定时同步电路,其包括:用于计算循环前缀自相关函数的自相关函数计算器和用于搜索循环前缀自相关函数的峰值位置以指示接收的通信符号的符号边界的偏移时间估计器。 偏移时间估计器将当前峰值位置与先前的峰值位置进行比较。 如果(a)位置差大于阈值,并且(b)电流峰值小于参考平均峰值,则将电流峰值确定为假; 偏移时间估计器除去并将当前峰值位置替换为先前的峰值位置; 并且在参考平均峰值计算中不引入当前峰值。