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    Spheroidal particles for olefin polymerization catalyst
    1.
    发明授权
    Spheroidal particles for olefin polymerization catalyst 有权
    用于烯烃聚合催化剂的球形颗粒

    公开(公告)号：US08633124B2

    公开(公告)日：2014-01-21

    申请号：US12989230

    申请日：2008-09-01

    申请人： Virendrakumar Gupta ,  Saurabh Singh ,  Umesh Makwana ,  Jomichan Joseph ,  Kamlesh Singala ,  Smitha Rajesh ,  Vallabhbhai Patel ,  Mukeshkumar Yadav ,  Gurmeet Singh

    发明人： Virendrakumar Gupta ,  Saurabh Singh ,  Umesh Makwana ,  Jomichan Joseph ,  Kamlesh Singala ,  Smitha Rajesh ,  Vallabhbhai Patel ,  Mukeshkumar Yadav ,  Gurmeet Singh

    IPC分类号： C08F4/02 ,  B01J31/00

    CPC分类号： C07C31/28 ,  C07C29/70 ,  C08F10/00 ,  C07C31/30 ,  C08F4/6494 ,  C08F4/6548

    摘要： The invention relates to a process for the synthesis of spheroidal magnesium alkoxide having improved mechanical strength and narrow particle size distribution, the process comprising reacting magnesium metal, in the presence of iodine, with a mixture of alcohols by step-wise heating first in the range of 40° C. to 65° C. for a period of 2 hours and then in the range of 65° C. to 80° C. for a period of 1 hour, further by maintaining reaction temperature at 80° C. for a period of 6-10 hours, the vapors of the mixture produced during the reaction being condensed in an overhead condenser, hydrogen gas produced during the reaction being vented off and the mixture of alcohols left after the reaction being filtered and reused. The invention also relates to spheroidal magnesium alkoxide particles synthesized by the method, to the Ziegler natta procatalyst synthesized by using the alkoxide and to the polymer resin synthesized using the procatalyst.

    摘要翻译： 本发明涉及一种合成具有改善的机械强度和窄粒度分布的球形镁醇盐的方法，该方法包括在碘的存在下使镁金属与醇的混合物反应，首先在该范围内逐步加热 在40℃至65℃下加热2小时，然后在65℃至80℃的范围内持续1小时，此外通过将反应温度保持在80℃，以获得 时间为6-10小时，反应中产生的混合物的蒸气在塔顶冷凝器中冷凝，在反应期间产生的氢气被排出，反应后留下的醇的混合物被过滤并重新使用。 本发明还涉及通过该方法合成的球形烷醇镁颗粒，使用通过使用醇盐合成的齐格勒纳塔催化剂和使用前催化剂合成的聚合物树脂。

    Module validation
    2.
    发明授权
    Module validation 失效
    模块验证

    公开(公告)号：US08423790B2

    公开(公告)日：2013-04-16

    申请号：US12620402

    申请日：2009-11-17

    申请人： Farshid Atashband ,  Ryan Ruppert ,  Saurabh Singh

    发明人： Farshid Atashband ,  Ryan Ruppert ,  Saurabh Singh

    IPC分类号： G06F11/30 ,  G06F12/14 ,  H04L29/06 ,  G06F17/30

    CPC分类号： G07F17/32 ,  G06F21/121 ,  G06F2221/2109 ,  G07F17/323 ,  G07F17/3241

    摘要： A module validation system and methods are disclosed for use with graphical user interfaces provided by a workstation that, among other things, remotely monitor and/or control game and/or gaming devices and/or systems. Validation of modules used in shells that provide graphical user interfaces enables the module validation system to provide users with varying levels of access to a gaming system.

    摘要翻译： 公开了用于由工作站提供的图形用户界面使用的模块验证系统和方法，其中远程监视和/或控制游戏和/或游戏设备和/或系统。 验证在提供图形用户界面的shell中使用的模块使模块验证系统能够向用户提供对游戏系统的不同级别的访问。

    Method, system, and computer program product for implementing automated worklists
    3.
    发明授权
    Method, system, and computer program product for implementing automated worklists 失效
    用于实现自动化工作列表的方法，系统和计算机程序产品

    公开(公告)号：US08326864B2

    公开(公告)日：2012-12-04

    申请号：US12254968

    申请日：2008-10-21

    申请人： Prateek Agrawal ,  Rishi Arora ,  Walter C. Dietrich ,  Regina L. Haecker ,  Robert Hazeu ,  Saurabh Singh

    发明人： Prateek Agrawal ,  Rishi Arora ,  Walter C. Dietrich ,  Regina L. Haecker ,  Robert Hazeu ,  Saurabh Singh

    IPC分类号： G06F17/30

    CPC分类号： G06Q10/06

    摘要： A method, system, and computer program product for implementing automated worklists are provided. The method includes generating a worklist, which further includes retrieving a worklist template corresponding to the worklist and, via a first query, selecting a listing of members and attributes to be populated in the worklist, the attributes include a status indicator of an action item specified for each of the members of the worklist. The worklist generation also includes building a worklist member table with results of the first query and, via a second query, and using attributes of the worklist member table, identifying up-to-date values of one or more worklist member attributes, and outputting results of the second query to the worklist. The method also includes presenting the worklist to a corresponding assignee. For each of the members in the worklist, the status indicator is editable to update a status of the member.

    摘要翻译： 提供了一种用于实现自动化工作列表的方法，系统和计算机程序产品。 该方法包括生成工作列表，其还包括检索与工作列表相对应的工作列表模板，并且经由第一查询选择要在工作列表中填充的成员和属性的列表，所述属性包括指定的操作项的状态指示符 为工作清单的每个成员。 工作列表生成还包括构建具有第一查询的结果的工作列表成员表，以及通过第二查询，并使用工作列表成员表的属性，识别一个或多个工作列表成员属性的最新值，并输出结果 的第二个查询到工作列表。 该方法还包括将工作列表呈现给相应的受让人。 对于工作列表中的每个成员，状态指示器是可编辑的，以更新成员的状态。

    Minimizing changes in common mode voltage at inputs of an operational amplifier used in a switched capacitor differential amplifier
    5.
    发明授权
    Minimizing changes in common mode voltage at inputs of an operational amplifier used in a switched capacitor differential amplifier 有权
    最小化开关电容差分放大器中使用的运算放大器输入端的共模电压变化

    公开(公告)号：US07795958B2

    公开(公告)日：2010-09-14

    申请号：US12177170

    申请日：2008-07-22

    申请人： Nitin Agarwal ,  Saurabh Singh

    发明人： Nitin Agarwal ,  Saurabh Singh

    IPC分类号： H03F1/02

    CPC分类号： H03F3/005 ,  H03F3/45475 ,  H03F3/45928 ,  H03F2203/45101 ,  H03F2203/45586 ,  H03F2203/45588

    摘要： A reference generation circuit provided according to an aspect of the present invention generates a reference potential at different levels in the hold phase of different cycles in an input path of a switched capacitor differential amplifier. In an embodiment, for each hold phase, the reference generator provides the reference potential with a magnitude that tracks the magnitude of the input signal applied in a corresponding (preceding) sample phase. In case of a single-ended output, the reference potential generated for each hold phase equals the magnitude of one of the inputs on the differential input path. As a result, the common mode voltage at the input terminals of an operational amplifier contained in the switched capacitor differential amplifier is maintained at a desired level.

    摘要翻译： 根据本发明的一方面提供的参考生成电路在开关电容差分放大器的输入路径中的不同周期的保持相位中产生不同电平的参考电位。 在一个实施例中，对于每个保持相位，参考发生器提供具有跟踪在相应的（在前）采样相位中施加的输入信号的幅度的幅度的参考电位。 在单端输出的情况下，为每个保持相产生的参考电位等于差分输入路径上的一个输入的幅度。 结果，包含在开关电容差分放大器中的运算放大器的输入端的共模电压保持在期望的水平。

    Minimizing Changes In Common Mode Voltage At Inputs Of An Operational Amplifier Used In A Switched Capacitor Differential Amplifier
    6.
    发明申请
    Minimizing Changes In Common Mode Voltage At Inputs Of An Operational Amplifier Used In A Switched Capacitor Differential Amplifier 有权
    在开关电容差分放大器中使用的运算放大器的输入处，最小化共模电压的变化

    公开(公告)号：US20100019841A1

    公开(公告)日：2010-01-28

    申请号：US12177170

    申请日：2008-07-22

    申请人： Nitin Agarwal ,  Saurabh Singh

    发明人： Nitin Agarwal ,  Saurabh Singh

    IPC分类号： H03F1/02

    CPC分类号： H03F3/005 ,  H03F3/45475 ,  H03F3/45928 ,  H03F2203/45101 ,  H03F2203/45586 ,  H03F2203/45588

    摘要： A reference generation circuit provided according to an aspect of the present invention generates a reference potential at different levels in the hold phase of different cycles in an input path of a switched capacitor differential amplifier. In an embodiment, for each hold phase, the reference generator provides the reference potential with a magnitude that tracks the magnitude of the input signal applied in a corresponding (preceding) sample phase. In case of a single-ended output, the reference potential generated for each hold phase equals the magnitude of one of the inputs on the differential input path. As a result, the common mode voltage at the input terminals of an operational amplifier contained in the switched capacitor differential amplifier is maintained at a desired level.

    摘要翻译： 根据本发明的一方面提供的参考生成电路在开关电容差分放大器的输入路径中的不同周期的保持相位中产生不同电平的参考电位。 在一个实施例中，对于每个保持相位，参考发生器提供具有跟踪在相应的（在前）采样相位中施加的输入信号的幅度的幅度的参考电位。 在单端输出的情况下，为每个保持相产生的参考电位等于差分输入路径上的一个输入的幅度。 结果，包含在开关电容差分放大器中的运算放大器的输入端的共模电压保持在期望的水平。

    SYSTEM AND METHOD FOR ANALYZING A VIDEO FILE IN A SHORTENED TIME FRAME
    7.
    发明申请
    SYSTEM AND METHOD FOR ANALYZING A VIDEO FILE IN A SHORTENED TIME FRAME 审中-公开

    公开(公告)号：US20200151455A1

    公开(公告)日：2020-05-14

    申请号：US16739657

    申请日：2020-01-10

    申请人： Nagender Sangra ,  Saurabh Singh ,  Rahul Jain

    发明人： Nagender Sangra ,  Saurabh Singh ,  Rahul Jain

    IPC分类号： G06K9/00 ,  G10L13/04 ,  G11B27/34 ,  G11B27/19

    摘要： A system for analyzing a video file in a shortened time frame, said system comprising: a receiver (VFR) to receive a video file (VF) as an input; a Time Splitter (TR) to split the received video file according to set intervals of time depending on how fast said video is to be analyzed; a Frame splitter (FP) to split a Video Viewing Program (R) into a plurality of frames (F1, F2, . . . Fn); a Key Frame Identification mechanism (KFI) to identify key frames; and linking mechanism (LM) to cause a link to be formed with pre-populated databases and in-house libraries of images (D), of frames, which frames comprising associated tags, thereby determining a score of similar tags per video file in order to determine said genre, thereby determining multiplicity of instances for said time splitter.