公开(公告)号：US08914608B2

公开(公告)日：2014-12-16

申请号：US13025584

申请日：2011-02-11

申请人： Sang-Jin Oh ,  Jeonguk Kang

发明人： Sang-Jin Oh ,  Jeonguk Kang

IPC分类号： G06F12/10

CPC分类号： G06F12/1009

摘要： A data storage device includes a storage medium configured to store data; and a controller configured to control the storage medium, the controller including address mapping information. The controller is configured to divide the address mapping information into at least a first address mapping table and a second address mapping table based on information regarding temporary data received at the controller. The first address mapping table is configured to map one or more addresses of valid data and to be backed up to the storage medium. The second mapping address table being configured to map one or more addresses of the temporary data and to not be backed up to the storage medium.

摘要翻译： 数据存储装置包括配置为存储数据的存储介质; 以及控制器，被配置为控制所述存储介质，所述控制器包括地址映射信息。 控制器被配置为基于关于在控制器处接收的临时数据的信息将地址映射信息划分为至少第一地址映射表和第二地址映射表。 第一地址映射表被配置为映射有效数据的一个或多个地址并被备份到存储介质。 第二映射地址表被配置为映射临时数据的一个或多个地址，并且不备份到存储介质。

公开(公告)号：US08766368B2

公开(公告)日：2014-07-01

申请号：US13615092

申请日：2012-09-13

申请人： Chun Soo Kang ,  Sang Jin Oh

发明人： Chun Soo Kang ,  Sang Jin Oh

IPC分类号： H01L27/088 ,  H01L21/768 ,  H01L29/24

CPC分类号： H01L27/10894 ,  H01L27/0203

摘要： Semiconductor devices are provided. The semiconductor device includes a semiconductor substrate having a cell region and a peripheral region, first and second conductive line extending onto the semiconductor substrate to constitute a peripheral circuit, a first interlayer insulation layer on the first and second conductive lines, a first peripheral interconnection pattern on the first interlayer insulation layer of the peripheral region, a first contact plug disposed in the first interlayer insulation layer, second peripheral interconnection patterns on the second interlayer insulation layer of the peripheral region, a second contact plug disposed in the second interlayer insulation layer to electrically connect the first peripheral interconnection pattern to one of the second peripheral interconnection patterns, and a third contact plug penetrating the first and second interlayer insulation layers to electrically connect the second conductive line to another one of the second peripheral interconnection patterns.

摘要翻译： 提供半导体器件。 半导体器件包括具有单元区域和周边区域的半导体衬底，延伸到半导体衬底上以构成外围电路的第一和第二导电线，第一和第二导电线路上的第一层间绝缘层，第一外围互连图案 在周边区域的第一层间绝缘层上，设置在第一层间绝缘层中的第一接触插塞，在周边区域的第二层间绝缘层上的第二外围互连图案，设置在第二层间绝缘层中的第二接触插塞， 将第一外围互连图形电连接到第二外围互连图案之一，以及穿过第一和第二层间绝缘层的第三接触插塞，以将第二导电线电连接到第二外围互连图案中的另一个。

公开(公告)号：US08745309B2

公开(公告)日：2014-06-03

申请号：US11833731

申请日：2007-08-03

申请人： Myoung-Soo Jung ,  Chan-Ik Park ,  Sang-Jin Oh

发明人： Myoung-Soo Jung ,  Chan-Ik Park ,  Sang-Jin Oh

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/1041 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7206 ,  G11C16/349

摘要： A cooperative memory card system includes a memory card device, and a host in signal communication with the memory card device, where the host assumes at least one memory management function for the memory card device; and a corresponding method of cooperative memory management between a host and a memory card device includes selecting at least one of several memory management functions to be performed by the host for the device.

摘要翻译： 协作存储卡系统包括存储卡设备和与存储卡设备进行信号通信的主机，其中主机对存储卡设备采取至少一个存储器管理功能; 以及在主机和存储卡设备之间的协作存储器管理的相应方法包括选择由主机为设备执行的几个存储器管理功能中的至少一个。

公开(公告)号：US20130193518A1

公开(公告)日：2013-08-01

申请号：US13615092

申请日：2012-09-13

申请人： Chun Soo KANG ,  Sang Jin OH

发明人： Chun Soo KANG ,  Sang Jin OH

IPC分类号： H01L27/088 ,  H01L21/768

CPC分类号： H01L27/10894 ,  H01L27/0203

摘要： Semiconductor devices are provided. The semiconductor device includes a semiconductor substrate having a cell region and a peripheral region, first and second conductive line extending onto the semiconductor substrate to constitute a peripheral circuit, a first interlayer insulation layer on the first and second conductive lines, a first peripheral interconnection pattern on the first interlayer insulation layer of the peripheral region, a first contact plug disposed in the first interlayer insulation layer, second peripheral interconnection patterns on the second interlayer insulation layer of the peripheral region, a second contact plug disposed in the second interlayer insulation layer to electrically connect the first peripheral interconnection pattern to one of the second peripheral interconnection patterns, and a third contact plug penetrating the first and second interlayer insulation layers to electrically connect the second conductive line to another one of the second peripheral interconnection patterns.

摘要翻译： 提供半导体器件。 半导体器件包括具有单元区域和周边区域的半导体衬底，延伸到半导体衬底上以构成外围电路的第一和第二导电线，第一和第二导电线路上的第一层间绝缘层，第一外围互连图案 在周边区域的第一层间绝缘层上，设置在第一层间绝缘层中的第一接触插塞，在周边区域的第二层间绝缘层上的第二外围互连图案，设置在第二层间绝缘层中的第二接触插塞， 将第一外围互连图形电连接到第二外围互连图案之一，以及穿过第一和第二层间绝缘层的第三接触插塞，以将第二导电线电连接到第二外围互连图案中的另一个。

公开(公告)号：US08122193B2

公开(公告)日：2012-02-21

申请号：US12775767

申请日：2010-05-07

申请人： Donghyun Song ,  Chanik Park ,  Sang Lyul Min ,  Sheayun Lee ,  Taesung Jung ,  Sang-Jin Oh ,  Moonwook Oh ,  Jisoo Kim

发明人： Donghyun Song ,  Chanik Park ,  Sang Lyul Min ,  Sheayun Lee ,  Taesung Jung ,  Sang-Jin Oh ,  Moonwook Oh ,  Jisoo Kim

IPC分类号： G06F12/00

CPC分类号： G06F3/0656 ,  G06F3/0616 ,  G06F3/0625 ,  G06F3/0679 ,  Y02D10/154

摘要： A storage device includes a host interface, a buffer memory, a storage medium, and a controller. The host interface is configured to receive storage data and an invalidation command, where the invalidation command is indicative of invalid data among the storage data received by the host interface. The buffer memory is configured to temporarily store the storage data received by the host interface. The controller is configured to execute a transcribe operation in which the storage data temporarily stored in the buffer memory is selectively stored in the storage medium. Further, the controller is responsive to receipt of the invalidation command to execute a logging process when a memory capacity of the invalid data indicated by the invalidation command is equal to or greater than a reference capacity, and to execute an invalidation process when the memory capacity of the invalid data is less than the reference capacity. The logging process includes logging a location of the invalid data, and the invalidation process includes invalidating the invalid data.

摘要翻译： 存储装置包括主机接口，缓冲存储器，存储介质和控制器。 主机接口被配置为接收存储数据和无效命令，其中无效命令指示由主机接口接收的存储数据中的无效数据。 缓冲存储器被配置为临时存储由主机接口接收的存储数据。 控制器被配置为执行转录操作，其中临时存储在缓冲存储器中的存储数据被选择性地存储在存储介质中。 此外，当由无效命令指示的无效数据的存储器容量等于或大于参考容量时，控制器响应于接收到无效命令以执行记录处理，并且当存储器容量 的无效数据小于参考能力。 记录过程包括记录无效数据的位置，无效过程包括使无效数据无效。

公开(公告)号：US07563104B2

公开(公告)日：2009-07-21

申请号：US11896298

申请日：2007-08-30

申请人： Han Kim ,  Yang Je Lee ,  Sang Jin Oh ,  Mi Ja Han

发明人： Han Kim ,  Yang Je Lee ,  Sang Jin Oh ,  Mi Ja Han

IPC分类号： H01R12/00

CPC分类号： H01R13/2407 ,  H01R12/58 ,  H05K3/365 ,  H05K2201/10295

摘要： The Printed Circuit Board (PCB) has connectors which each include a terminal part and a connector pin. The terminal part is formed in one end of the PCB and is provided with a terminal hole. The connector pin is configured such that one end thereof is inserted into the terminal hole, and the remaining end thereof extends to protrude outside the terminal hole and is also bent several times, thus forming a contact part that is elastically deformed, and electrically connected to a pad part provided in a target PCB for connection. Thus, a desirable signal transmission characteristic is guaranteed, so that the reliability of electronic devices using the PCB can be improved and the manufacturing cost can also be reduced.

摘要翻译： 印刷电路板（PCB）具有连接器，每个连接器包括端子部分和连接器引脚。 端子部分形成在PCB的一端并设有端子孔。 连接器销被构造成使得其一端插入端子孔中，并且其剩余端延伸到端子孔外部并且也弯曲多次，从而形成弹性变形的接触部，并且电连接到 设置在目标PCB中用于连接的焊盘部分。 因此，保证期望的信号传输特性，从而可以提高使用PCB的电子设备的可靠性，并且还可以降低制造成本。

公开(公告)号：US08572310B2

公开(公告)日：2013-10-29

申请号：US12955207

申请日：2010-11-29

申请人： Sang-Jin Oh ,  Chanik Park

发明人： Sang-Jin Oh ,  Chanik Park

IPC分类号： G06F12/00

CPC分类号： G06F3/0644 ,  G06F3/061 ,  G06F3/0679 ,  G06F17/30218

摘要： In one aspect, meta data corresponding to a non-volatile storage media is read from the non-volatile storage media. Meta data to be updated is detected from the read meta data. Based on the read meta data and the detected meta data to be updated, storage areas of the non-volatile storage media are invalidated.

摘要翻译： 在一个方面，从非易失性存储介质读取对应于非易失性存储介质的元数据。 从读取的元数据中检测要更新的元数据。 基于读取的元数据和检测到的要更新的元数据，非易失性存储介质的存储区域无效。

公开(公告)号：US20120144090A1

公开(公告)日：2012-06-07

申请号：US13365485

申请日：2012-02-03

申请人： Donghyun Song ,  Chanik Park ,  Sang Lyul Min ,  Sheayun Lee ,  Taesung Jung ,  Sang-Jin Oh ,  Moonwook Oh ,  Jisoo Kim

发明人： Donghyun Song ,  Chanik Park ,  Sang Lyul Min ,  Sheayun Lee ,  Taesung Jung ,  Sang-Jin Oh ,  Moonwook Oh ,  Jisoo Kim

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F3/0656 ,  G06F3/0616 ,  G06F3/0625 ,  G06F3/0679 ,  Y02D10/154

摘要： A storage device includes a host interface, a buffer memory, a storage medium, and a controller. The host interface is configured to receive storage data and an invalidation command, where the invalidation command is indicative of invalid data among the storage data received by the host interface. The buffer memory is configured to temporarily store the storage data received by the host interface. The controller is configured to execute a transcribe operation in which the storage data temporarily stored in the buffer memory is selectively stored in the storage medium. Further, the controller is responsive to receipt of the invalidation command to execute a logging process when a memory capacity of the invalid data indicated by the invalidation command is equal to or greater than a reference capacity.

摘要翻译： 存储装置包括主机接口，缓冲存储器，存储介质和控制器。 主机接口被配置为接收存储数据和无效命令，其中无效命令指示由主机接口接收的存储数据中的无效数据。 缓冲存储器被配置为临时存储由主机接口接收的存储数据。 控制器被配置为执行转录操作，其中临时存储在缓冲存储器中的存储数据被选择性地存储在存储介质中。 此外，当由无效命令指示的无效数据的存储器容量等于或大于参考容量时，控制器响应于接收到无效命令以执行记录处理。

公开(公告)号：US20110072188A1

公开(公告)日：2011-03-24

申请号：US12955207

申请日：2010-11-29

申请人： Sang-Jin OH ,  Chanik PARK

发明人： Sang-Jin OH ,  Chanik PARK

IPC分类号： G06F12/00

CPC分类号： G06F3/0644 ,  G06F3/061 ,  G06F3/0679 ,  G06F17/30218

摘要： In one aspect, meta data corresponding to a non-volatile storage media is read from the non-volatile storage media. Meta data to be updated is detected from the read meta data. Based on the read meta data and the detected meta data to be updated, storage areas of the non-volatile storage media are invalidated.

摘要翻译： 在一个方面，从非易失性存储介质读取对应于非易失性存储介质的元数据。 从读取的元数据中检测要更新的元数据。 基于读取的元数据和检测到的要更新的元数据，非易失性存储介质的存储区域无效。

公开(公告)号：US20090292839A1

公开(公告)日：2009-11-26

申请号：US12453589

申请日：2009-05-15

申请人： Sang-Jin OH

发明人： Sang-Jin OH

IPC分类号： G06F13/00 ,  G06F12/02 ,  G06F12/00 ,  G06F12/10

CPC分类号： G06F13/1668 ,  G06F12/0246

摘要： A semiconductor memory device includes a nonvolatile memory device having a plurality of physical sectors, and a memory controller configured to translate a logical address received from a host to a physical address, with reference to mapping data that defines a correspondence between the logical address and the physical address. The nonvolatile memory device is configured to access a first physical sector corresponding to the physical address, and, when a data delete command is provided from the host to the memory controller to delete first data that is stored in the first physical sector, the memory controller delays an erase and/or merge operation for the first physical sector in which the first data is stored.

摘要翻译： 半导体存储器件包括具有多个物理扇区的非易失性存储器件，以及存储器控制器，被配置为将从主机接收到的逻辑地址转换为物理地址，参考定义逻辑地址和逻辑地址之间的对应关系的映射数据 实际地址。 非易失性存储器件被配置为访问对应于物理地址的第一物理扇区，并且当从主机向存储器控制器提供数据删除命令以删除存储在第一物理扇区中的第一数据时，存储器控制器 延迟其中存储第一数据的第一物理扇区的擦除和/或合并操作。