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    Semiconductor package with selective underfill and fabrication method therfor
    1.
    发明申请
    Semiconductor package with selective underfill and fabrication method therfor 有权
    具有选择性底部填充的半导体封装及其制造方法

    公开(公告)号：US20060252177A1

    公开(公告)日：2006-11-09

    申请号：US11121847

    申请日：2005-05-03

    申请人： Il Shim ,  Sheila Alvarez ,  Romeo Alvarez

    发明人： Il Shim ,  Sheila Alvarez ,  Romeo Alvarez

    IPC分类号： H01L21/00

    CPC分类号： H01L21/67092 ,  H01L2224/16245

    摘要： A method of manufacturing a semiconductor package includes providing a substrate having a plurality of contacts with solder bump contact areas that are unmasked. A plurality of underfill bumps is formed on the plurality of contacts selectively in the solder bump contact areas. A die having a plurality of solder bumps is positioned on the substrate so the plurality of solder bumps is substantially vertically aligned with the plurality of underfill bumps. The plurality of solder bumps is pressed into the plurality of underfill bumps until the plurality of solder bumps contacts the plurality of contacts. The plurality of solder bumps is reflowed. The die, the plurality of solder bumps, and the plurality of contacts are encapsulated to expose a lower surface of the plurality of contacts.

    摘要翻译： 制造半导体封装的方法包括提供具有多个触点的衬底，该触点具有未被掩模的焊料凸块接触区域。 多个底部填充凸块在焊料凸块接触区域中选择性地形成在多个触点上。 具有多个焊料凸块的裸片位于衬底上，使得多个焊料凸块基本上与多个底部填充凸块垂直对齐。 多个焊料凸块被压入多个底部填充凸块中，直到多个焊料凸块接触多个触点。 多个焊料凸块被回流。 模具，多个焊料凸块和多个触点被封装以暴露多个触点的下表面。