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49 条记录 (耗时 0.024 秒)

    Amplitude Monitor For High-Speed Signals
    1.
    发明申请
    Amplitude Monitor For High-Speed Signals 有权
    用于高速信号的幅度监视器

    公开(公告)号：US20120069938A1

    公开(公告)日：2012-03-22

    申请号：US13296193

    申请日：2011-11-14

    申请人： Ramin Farjad-Rad

    发明人： Ramin Farjad-Rad

    IPC分类号： H04L27/06

    CPC分类号： H04L7/033 ,  H04L7/0037

    摘要： A serial communication system includes a receiver with an amplitude monitor. The amplitude monitor compares the input signal with a reference level in response to a sample clock. The sample clock is periodically phase shifted with respect to the incoming data so the amplitude monitor is sure to sample an incoming data eye at or near the peak amplitude over a selected sample period. The amplitude detector notes the detection of an input signal if the input signal surpasses the reference level for any sample phase. The amplitude monitor experiments with different sample-clock phases over a number of data symbols, but is capable of measuring amplitude fast enough to resolve amplitude-based signals used for rate negotiation.”

    摘要翻译： 串行通信系统包括具有幅度监视器的接收机。 幅度监视器响应于采样时钟将输入信号与参考电平进行比较。 采样时钟相对于输入数据周期性地相移，因此振幅监视器确保在选定的采样周期内或接近峰值幅度对输入数据眼进行采样。 如果输入信号超过任何采样相位的参考电平，振幅检测器将注意到输入信号的检测。 振幅监测器对多个数据符号进行不同采样时钟相位的实验，但能够快速测量振幅，以解决用于速率协商的基于幅度的信号。

    Adaptive Receive-Side Equalization
    2.
    发明申请
    Adaptive Receive-Side Equalization 有权

    公开(公告)号：US20100054323A1

    公开(公告)日：2010-03-04

    申请号：US12615824

    申请日：2009-11-10

    申请人： Ramin Farjad-rad

    发明人： Ramin Farjad-rad

    IPC分类号： H04L27/01

    CPC分类号： H04L25/03159 ,  H04L25/03019 ,  H04L25/03343 ,  H04L25/03885 ,  H04L25/085 ,  H04L2025/03681

    摘要： An adaptive receiver equalizes incoming data expressed as a series of symbols, the degree of equalization being adjusted by some adaptive control logic. An amplitude detector samples the amplitude of the eye openings of incoming symbols and conveys the resulting measures of eye amplitude to the adaptive control logic. The control logic experiments with different equalization settings while monitoring the resulting eye amplitude to find the equalization setting that provides incoming data eyes of the highest amplitude. A data filter may be included to enable the amplitude detector only in response to particular incoming data patterns.

    Adaptive Receive-Side Equalization
    3.
    发明申请
    Adaptive Receive-Side Equalization 有权
    自适应接收端均衡

    公开(公告)号：US20100046597A1

    公开(公告)日：2010-02-25

    申请号：US12543983

    申请日：2009-08-19

    申请人： Ramin Farjad-rad

    发明人： Ramin Farjad-rad

    IPC分类号： H04L27/01

    CPC分类号： H04L25/03159 ,  H04L25/03019 ,  H04L25/03343 ,  H04L25/03885 ,  H04L25/085 ,  H04L2025/03681

    摘要： An adaptive receiver equalizes incoming data expressed as a series of symbols, the degree of equalization being adjusted by some adaptive control logic. An amplitude detector samples the amplitude of the eye openings of incoming symbols and conveys the resulting measures of eye amplitude to the adaptive control logic. The control logic experiments with different equalization settings while monitoring the resulting eye amplitude to find the equalization setting that provides incoming data eyes of the highest amplitude. A data filter may be included to enable the amplitude detector only in response to particular incoming data patterns.

    摘要翻译： 自适应接收机对输入数据进行均衡，表示为一系列符号，均衡程度由一些自适应控制逻辑调整。 振幅检测器对输入符号的眼睛开口的幅度进行采样，并将所得到的眼睛幅度测量值传达给自适应控制逻辑。 控制逻辑实验具有不同的均衡设置，同时监视所得到的眼睛幅度，以找到提供最高幅度的输入数据眼睛的均衡设置。 可以包括数据滤波器，以仅响应于特定的输入数据模式才能使能振幅检测器。

    Adaptive receive-side equalization
    4.
    发明授权
    Adaptive receive-side equalization 有权
    自适应接收侧均衡

    公开(公告)号：US07639736B2

    公开(公告)日：2009-12-29

    申请号：US10938373

    申请日：2004-09-10

    申请人： Ramin Farjad-rad

    发明人： Ramin Farjad-rad

    IPC分类号： H03H7/30

    CPC分类号： H04L25/03159 ,  H04L25/03019 ,  H04L25/03343 ,  H04L25/03885 ,  H04L25/085 ,  H04L2025/03681

    摘要： An adaptive receiver equalizes incoming data expressed as a series of symbols, the degree of equalization being adjusted by some adaptive control logic. An amplitude detector samples the amplitude of the eye openings of incoming symbols and conveys the resulting measures of eye amplitude to the adaptive control logic. The control logic experiments with different equalization settings while monitoring the resulting eye amplitude to find the equalization setting that provides incoming data eyes of the highest amplitude. A data filter may be included to enable the amplitude detector only in response to particular incoming data patterns.

    摘要翻译： 自适应接收机对输入数据进行均衡，表示为一系列符号，均衡程度由一些自适应控制逻辑调整。 振幅检测器对输入符号的眼睛开口的幅度进行采样，并将所得到的眼睛幅度测量值传达给自适应控制逻辑。 控制逻辑实验具有不同的均衡设置，同时监视所得到的眼睛幅度，以找到提供最高幅度的输入数据眼睛的均衡设置。 可以包括数据滤波器，以仅响应于特定的输入数据模式才能使能振幅检测器。

    Pass transistors with minimized capacitive loading
    5.
    发明授权
    Pass transistors with minimized capacitive loading 失效
    以最小的电容负载传递晶体管

    公开(公告)号：US07274242B2

    公开(公告)日：2007-09-25

    申请号：US10980021

    申请日：2004-11-02

    申请人： Ramin Farjad-rad

    发明人： Ramin Farjad-rad

    IPC分类号： H03K17/16

    CPC分类号： H03K17/162

    摘要： A tracking switch includes an MOS switching transistor with a control terminal coupled to a CMOS inverter. The relative geometries of the transistors that make up the inverter are significantly imbalanced, resulting is substantially different drive strengths (i.e., substantially different on-resistances). The gate of the switching transistor exhibits parasitic capacitances between its current-handling terminals and its control terminal. When the switching transistor is on, these capacitances shunt a portion of the switched signal to a power-supply node, with the problem increasing with the frequency of the propagated signal. The geometry of the transistor used to turn on the switching transistor is selected to produce a high on-resistance, which introduces a high-impedance path from the control terminal of the switching transistor to ground when the switch is closed. The high-impedance path isolates the control terminal of the switching transistor from the supply, thus mitigating the capacitive loading effects of the parasitic capacitors. The transistor used to turn off the switching transistor has a much lower on-resistance than the transistor used to bias the switching transistor on, preventing undesirable signal feed-through from occurring when the switching transistor is off.

    摘要翻译： 跟踪开关包括具有耦合到CMOS反相器的控制端的MOS开关晶体管。 构成逆变器的晶体管的相对几何形状显着地不平衡，导致实质上不同的驱动强度（即，基本上不同的导通电阻）。 开关晶体管的栅极在其电流处理端子及其控制端子之间呈现寄生电容。 当开关晶体管导通时，这些电容将开关信号的一部分分流到电源节点，随着传播信号的频率增加问题。 选择用于导通开关晶体管的晶体管的几何形状以产生高导通电阻，当开关闭合时，其引入从开关晶体管的控制端到地的高阻抗路径。 高阻抗路径将开关晶体管的控制端与电源隔离，从而减轻寄生电容的电容负载效应。 用于关断开关晶体管的晶体管的导通电阻比用于偏置开关晶体管的晶体管导通电阻低得多，防止在开关晶体管截止时出现不希望的信号馈通。

    Low-power low-jitter variable delay timing circuit
    7.
    发明授权
    Low-power low-jitter variable delay timing circuit 有权
    低功耗低抖动可变延迟定时电路

    公开(公告)号：US06476656B2

    公开(公告)日：2002-11-05

    申请号：US09925753

    申请日：2001-08-09

    申请人： William J. Dally ,  Ramin Farjad-Rad ,  Teva J. Stone ,  Xiaoying Yu ,  John W. Poulton

    发明人： William J. Dally ,  Ramin Farjad-Rad ,  Teva J. Stone ,  Xiaoying Yu ,  John W. Poulton

    IPC分类号： H03H1126

    CPC分类号： G05F3/262

    摘要： The timing circuit includes at least one delay element and its supply voltage is obtained from an active current source. The current source is a current mirror which is driven by a differential amplifier. The differential amplifier compares a voltage on the delay element supply line to a voltage on a current control node connected to a voltage controlled current source. An RC compensating circuit may be coupled to the current control node.

    摘要翻译： 定时电路包括至少一个延迟元件，并且其电源电压是从有源电流源获得的。 电流源是由差分放大器驱动的电流镜。 差分放大器将延迟元件供电线上的电压与连接到电压控制电流源的电流控制节点上的电压进行比较。 RC补偿电路可以耦合到电流控制节点。

    Adaptive receive-side equalization
    10.
    发明授权
    Adaptive receive-side equalization 有权

    公开(公告)号：US08446940B2

    公开(公告)日：2013-05-21

    申请号：US12543983

    申请日：2009-08-19

    申请人： Ramin Farjad-rad

    发明人： Ramin Farjad-rad

    IPC分类号： H03H7/30

    CPC分类号： H04L25/03159 ,  H04L25/03019 ,  H04L25/03343 ,  H04L25/03885 ,  H04L25/085 ,  H04L2025/03681

    摘要： An adaptive receiver equalizes incoming data expressed as a series of symbols, the degree of equalization being adjusted by some adaptive control logic. An amplitude detector samples the amplitude of the eye openings of incoming symbols and conveys the resulting measures of eye amplitude to the adaptive control logic. The control logic experiments with different equalization settings while monitoring the resulting eye amplitude to find the equalization setting that provides incoming data eyes of the highest amplitude. A data filter may be included to enable the amplitude detector only in response to particular incoming data patterns.