公开(公告)号：US20100122264A1

公开(公告)日：2010-05-13

申请号：US12317854

申请日：2008-12-30

Applicant: Zhou Xiaocheng ,  Shoumeng Yan ,  Ying Gao ,  Hu Chen ,  Peinan Zhang ,  Mohan Rajagopalan ,  Avi Mendelson ,  Bratin Saha

Inventor： Zhou Xiaocheng ,  Shoumeng Yan ,  Ying Gao ,  Hu Chen ,  Peinan Zhang ,  Mohan Rajagopalan ,  Avi Mendelson ,  Bratin Saha

IPC: G06F9/54 ,  G06F12/00 ,  G06F13/14

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/682 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide language support for CPU-GPU platforms. In one embodiment, code can be flexibly executed on both the CPU and GPU. CPU code can offload a kernel to the GPU. That kernel may in turn call preexisting libraries on the CPU, or make other calls into CPU functions. This allows an application to be built without requiring the entire call chain to be recompiled. Additionally, in one embodiment data may be shared seamlessly between CPU and GPU. This includes sharing objects that may have virtual functions. Embodiments thus ensure the right virtual function gets invoked on the CPU or the GPU if a virtual function is called by either the CPU or GPU.

Abstract translation: 本发明的实施例为CPU-GPU平台提供语言支持。 在一个实施例中，可以在CPU和GPU两者上灵活地执行代码。 CPU代码可以将内核卸载到GPU。 该内核可能会调用CPU上的预先存在的库，或者调用其他CPU函数。 这允许构建应用程序，而不需要重新编译整个调用链。 此外，在一个实施例中，数据可以在CPU和GPU之间无缝共享。 这包括共享可能具有虚拟功能的对象。 因此，如果CPU或GPU调用虚拟功能，这些实施例可以确保在CPU或GPU上调用正确的虚拟功能。

公开(公告)号：US20140375662A1

公开(公告)日：2014-12-25

申请号：US14320985

申请日：2014-07-01

Applicant: HU CHEN ,  YING GAO ,  XIAOCHENG ZHOU ,  SHOUMENG YAN ,  PEINAN ZHANG ,  MOHAN RAJAGOPALAN ,  JESSE FANG ,  AVI MENDELSON ,  Bratin Saha

Inventor： HU CHEN ,  YING GAO ,  XIAOCHENG ZHOU ,  SHOUMENG YAN ,  PEINAN ZHANG ,  MOHAN RAJAGOPALAN ,  JESSE FANG ,  AVI MENDELSON ,  Bratin Saha

IPC: G06F12/10 ,  G06F12/08 ,  G06T1/60

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/682 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.

Abstract translation: 本发明的实施例提供了一种用于CPU-GPU平台的编程模型。 特别地，本发明的实施例为集成和分立设备提供统一的编程模型。 该模型还适用于多个GPU卡和混合GPU系统（分立和集成）。 这允许软件供应商编写单个应用程序堆栈并将其定位到所有不同的平台。 另外，本发明的实施例提供了CPU和GPU之间的共享存储器模型。 而不是共享整个虚拟地址空间，只需要共享虚拟地址空间的一部分。 这允许在离散和集成设置中有效实现。

公开(公告)号：US20100118041A1

公开(公告)日：2010-05-13

申请号：US12317853

申请日：2008-12-30

Applicant: Hu Chen ,  Ying Gao ,  Zhou Xiaocheng ,  Shoumeng Yan ,  Peinan Zhang ,  Mohan Rajagopalan ,  Jesse Fang ,  Avi Mendelson ,  Bratin Saha

Inventor： Hu Chen ,  Ying Gao ,  Zhou Xiaocheng ,  Shoumeng Yan ,  Peinan Zhang ,  Mohan Rajagopalan ,  Jesse Fang ,  Avi Mendelson ,  Bratin Saha

IPC: G06F15/167

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/682 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.

Abstract translation: 本发明的实施例提供了一种用于CPU-GPU平台的编程模型。 特别地，本发明的实施例为集成和分立设备提供统一的编程模型。 该模型还适用于多个GPU卡和混合GPU系统（分立和集成）。 这允许软件供应商编写单个应用程序堆栈并将其定位到所有不同的平台。 另外，本发明的实施例提供了CPU和GPU之间的共享存储器模型。 而不是共享整个虚拟地址空间，只需要共享虚拟地址空间的一部分。 这允许在离散和集成设置中有效实现。

公开(公告)号：US08397241B2

公开(公告)日：2013-03-12

申请号：US12317854

申请日：2008-12-30

Applicant: Zhou Xiaocheng ,  Shoumeng Yan ,  Ying Gao ,  Hu Chen ,  Peinan Zhang ,  Mohan Rajagopalan ,  Avi Mendelson ,  Bratin Saha

Inventor： Zhou Xiaocheng ,  Shoumeng Yan ,  Ying Gao ,  Hu Chen ,  Peinan Zhang ,  Mohan Rajagopalan ,  Avi Mendelson ,  Bratin Saha

IPC: G06F9/44 ,  G06F13/14 ,  G06F13/00

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/682 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide language support for CPU-GPU platforms. In one embodiment, code can be flexibly executed on both the CPU and GPU. CPU code can offload a kernel to the GPU. That kernel may in turn call preexisting libraries on the CPU, or make other calls into CPU functions. This allows an application to be built without requiring the entire call chain to be recompiled. Additionally, in one embodiment data may be shared seamlessly between CPU and GPU. This includes sharing objects that may have virtual functions. Embodiments thus ensure the right virtual function gets invoked on the CPU or the GPU if a virtual function is called by either the CPU or GPU.

公开(公告)号：US20100023931A1

公开(公告)日：2010-01-28

申请号：US12178842

申请日：2008-07-24

Applicant: Buqi Cheng ,  Tin-Fook Ngai ,  Zhaohui Du ,  PeiNan Zhang

Inventor： Buqi Cheng ,  Tin-Fook Ngai ,  Zhaohui Du ,  PeiNan Zhang

IPC: G06F9/45

CPC classification number: G06F8/433

Abstract: A method to provide effective control and data flow information in an Intermediate Representation (IR) form. A Path Sensitive single Assignment (PSA) IR form with effective and explicit control and data path information supports control flow sensitive optimizations such as path sensitive symbolic substitution, array privatization and speculative multi threading. In the definition of PSA form, besides defining new versioned variables, the gamma functions keep control path information. The gamma function in PSA form keeps the basic attribute of SSA IR form and only one definition exists for each use. Therefore, all existing Single Static Assignment (SSA) IR form based analysis can be applied in PSA form. The gamma function in PSA form keeps all essential control flow information and eliminates unnecessary predicates at the same time.

Abstract translation: 一种以中间表示（IR）形式提供有效控制和数据流信息的方法。 路径敏感单分配（PSA）具有有效和显式控制和数据路径信息的IR形式支持控制流敏感优化，如路径敏感符号替换，数组私有化和投机多线程。 在PSA形式的定义中，除了定义新的版本变量之外，伽马函数还保留了控制路径信息。 PSA形式的伽玛函数保持SSA IR形式的基本属性，并且每次使用只存在一个定义。 因此，所有现有的单静态分配（SSA）IR形式分析可以以PSA形式应用。 PSA形式的伽玛功能保留所有必要的控制流信息，同时消除不必要的谓词。

公开(公告)号：US20220391248A1

公开(公告)日：2022-12-08

申请号：US17819325

申请日：2022-08-12

Applicant: Prashant CHAUDHARI ,  Stanislav BRATANOV ,  Peinan ZHANG ,  Jeffery S. BOLES

Inventor： Prashant CHAUDHARI ,  Stanislav BRATANOV ,  Peinan ZHANG ,  Jeffery S. BOLES

IPC: G06F9/48 ,  G06F9/38 ,  G06F9/54

Abstract: Examples relate to a monitoring apparatus, a monitoring device, a monitoring method, and to a corresponding computer program and system. The monitoring apparatus is configured to obtain a first compute kernel to be monitored and to obtain one or more second compute kernels. The monitoring apparatus is configured to provide instructions, using interface circuitry, to control circuitry of a computing device comprising a plurality of execution units, to instruct the control circuitry to execute the first compute kernel using a first slice of the plurality of execution units and to execute the one or more second compute kernels concurrently with the first compute kernel using one or more second slices of the plurality of execution units, and to instruct the control circuitry to provide information on a change of a status of at least one hardware counter associated with the first slice that is caused by the execution of the first compute kernel. The monitoring apparatus is configured to determine information on the execution of the first compute kernel based on the information on the change of the status of the at least one hardware counter.

公开(公告)号：US20140306972A1

公开(公告)日：2014-10-16

申请号：US14173071

申请日：2014-02-05

Applicant: Xiaocheng Zhou ,  Shoumeng Yan ,  Ying Gao ,  Hu Chen ,  Peinan Zhang ,  Mohan Rajagopalan ,  Avi Mendelson ,  Bratin Saha

Inventor： Xiaocheng Zhou ,  Shoumeng Yan ,  Ying Gao ,  Hu Chen ,  Peinan Zhang ,  Mohan Rajagopalan ,  Avi Mendelson ,  Bratin Saha

IPC: G06T1/60

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/682 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide language support for CPU-GPU platforms. In one embodiment, code can be flexibly executed on both the CPU and GPU. CPU code can offload a kernel to the GPU. That kernel may in turn call preexisting libraries on the CPU, or make other calls into CPU functions. This allows an application to be built without requiring the entire call chain to be recompiled. Additionally, in one embodiment data may be shared seamlessly between CPU and GPU. This includes sharing objects that may have virtual functions. Embodiments thus ensure the right virtual function gets invoked on the CPU or the GPU if a virtual function is called by either the CPU or GPU.

Abstract translation: 本发明的实施例提供对CPU-GPU平台的语言支持。 在一个实施例中，可以在CPU和GPU两者上灵活地执行代码。 CPU代码可以将内核卸载到GPU。 该内核可能会调用CPU上的预先存在的库，或者调用其他CPU函数。 这允许构建应用程序，而不需要重新编译整个调用链。 此外，在一个实施例中，数据可以在CPU和GPU之间无缝共享。 这包括共享可能具有虚拟功能的对象。 因此，如果CPU或GPU调用虚拟功能，这些实施例可以确保在CPU或GPU上调用正确的虚拟功能。

公开(公告)号：US20140049550A1

公开(公告)日：2014-02-20

申请号：US14017498

申请日：2013-09-04

Applicant: Hu Chen ,  Gao Ying ,  Zhou Xiaocheng ,  Shoumeng Yan ,  Peinan Zhang ,  Mohan Rajagopalan ,  Jesse Fang ,  Avi Mendelson ,  Bratin Saha

Inventor： Hu Chen ,  Gao Ying ,  Zhou Xiaocheng ,  Shoumeng Yan ,  Peinan Zhang ,  Mohan Rajagopalan ,  Jesse Fang ,  Avi Mendelson ,  Bratin Saha

IPC: G06T1/60

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.

Abstract translation: 本发明的实施例提供了一种用于CPU-GPU平台的编程模型。 特别地，本发明的实施例为集成和分立设备提供统一的编程模型。 该模型还适用于多个GPU卡和混合GPU系统（分立和集成）。 这允许软件供应商编写单个应用程序堆栈并将其定位到所有不同的平台。 另外，本发明的实施例提供了CPU和GPU之间的共享存储器模型。 而不是共享整个虚拟地址空间，只需要共享虚拟地址空间的一部分。 这允许在离散和集成设置中有效实现。

公开(公告)号：US07363211B1

公开(公告)日：2008-04-22

申请号：US10792668

申请日：2004-03-03

Applicant: Narayani Naganathan ,  Peinan Zhang

Inventor： Narayani Naganathan ,  Peinan Zhang

IPC: G06F7/00 ,  G06F9/455

CPC classification number: H04L41/12 ,  H04L41/0233 ,  H04L41/08

Abstract: The invention relates to a method for modeling a device in a topology including defining a managed object corresponding to the device, defining a managed resource using the managed object, and creating a node in the topology, wherein creating the node comprises associating the node with the managed resource.

Abstract translation: 本发明涉及一种用于对拓扑中的设备进行建模的方法，包括定义与设备相对应的被管理对象，使用被管理对象定义被管理资源，以及在该拓扑中创建节点，其中，创建该节点包括将该节点与 管理资源。

公开(公告)号：US08531471B2

公开(公告)日：2013-09-10

申请号：US12317853

申请日：2008-12-30

Applicant: Hu Chen ,  Ying Gao ,  Zhou Xiaocheng ,  Shoumeng Yan ,  Peinan Zhang ,  Mohan Rajagopalan ,  Jesse Fang ,  Avi Mendelson ,  Bratin Saha

Inventor： Hu Chen ,  Ying Gao ,  Zhou Xiaocheng ,  Shoumeng Yan ,  Peinan Zhang ,  Mohan Rajagopalan ,  Jesse Fang ,  Avi Mendelson ,  Bratin Saha

IPC: G06F15/167 ,  G06F12/00 ,  G06F12/02 ,  G06F12/10

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/682 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.

Abstract translation: 本发明的实施例提供了一种用于CPU-GPU平台的编程模型。 特别地，本发明的实施例为集成和分立设备提供统一的编程模型。 该模型还适用于多个GPU卡和混合GPU系统（分立和集成）。 这允许软件供应商编写单个应用程序堆栈并将其定位到所有不同的平台。 另外，本发明的实施例提供了CPU和GPU之间的共享存储器模型。 而不是共享整个虚拟地址空间，只需要共享虚拟地址空间的一部分。 这允许在离散和集成设置中有效实现。