公开(公告)号：US08563961B2

公开(公告)日：2013-10-22

申请号：US13515435

申请日：2010-12-13

申请人： Yoshitaka Sasago ,  Akio Shima ,  Satoru Hanzawa ,  Takashi Kobayashi ,  Masaharu Kinoshita ,  Norikastsu Takaura

发明人： Yoshitaka Sasago ,  Akio Shima ,  Satoru Hanzawa ,  Takashi Kobayashi ,  Masaharu Kinoshita ,  Norikastsu Takaura

IPC分类号： H01L47/00

CPC分类号： H01L45/1666 ,  H01L27/224 ,  H01L27/2409 ,  H01L27/2454 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1206 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1641 ,  H01L45/1675 ,  H01L45/1683

摘要： Disclosed are a semiconductor storage device and a method for manufacturing the semiconductor storage device, whereby the bit cost of memory using a variable resistance material is reduced. The semiconductor storage device has: a substrate; a first word line (2) which is provided above the substrate; a first laminated body, which is disposed above the first word line (2), and which has the N+1 (N≧1) number of first inter-gate insulating layers (11-15) and the N number of first semiconductor layers (21p-24p) alternately laminated in the height direction of the substrate; a first bit line (3), which extends in the direction that intersects the first word line (2), and which is disposed above the laminated body; a first gate insulating layer (9) which is provided on the side surface of the N+1 number of the first inter-gate insulating layers (11-15) and those of the N number of the first semiconductor layers (21p-24p); a first channel layer (8p) which is provided on the side surface of the first gate insulating layer (9); and a first variable resistance material layer (7) which is provided on the side surface of the first channel layer. The first variable material layer (7) is in a region where the first word line (2) and the first bit line (3) intersect each other. Furthermore, a polysilicon diode (PD) is used as a selection element.

摘要翻译： 公开了一种半导体存储装置和用于制造半导体存储装置的方法，由此降低了使用可变电阻材料的存储器的位成本。 半导体存储装置具有：基板; 设置在基板上方的第一字线（2） 第一层叠体，其设置在第一字线（2）的上方，并且具有N + 1（N> = 1）个第一栅极间绝缘层（11-15）和N个第一半导体 层（21p-24p）在基板的高度方向交替层叠; 第一位线（3），其在与所述第一字线（2）相交的方向上延伸，并且位于所述层叠体的上方; 设置在N + 1个第一栅极绝缘层（11-15）的侧表面和N个第一半导体层（21p-24p）的侧表面上的第一栅极绝缘层（9） ; 设置在第一栅极绝缘层（9）的侧面上的第一沟道层（8p）; 以及设置在第一沟道层的侧表面上的第一可变电阻材料层（7）。 第一可变材料层（7）在第一字线（2）和第一位线（3）彼此相交的区域中。 此外，使用多晶硅二极管（PD）作为选择元件。

公开(公告)号：US20120248399A1

公开(公告)日：2012-10-04

申请号：US13515435

申请日：2010-12-13

申请人： Yoshitaka Sasago ,  Akio Shima ,  Satoru Hanzawa ,  Takashi Kobayashi ,  Masaharu Kinoshita ,  Norikastsu Takaura

发明人： Yoshitaka Sasago ,  Akio Shima ,  Satoru Hanzawa ,  Takashi Kobayashi ,  Masaharu Kinoshita ,  Norikastsu Takaura

IPC分类号： H01L27/24

CPC分类号： H01L45/1666 ,  H01L27/224 ,  H01L27/2409 ,  H01L27/2454 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1206 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1641 ,  H01L45/1675 ,  H01L45/1683

摘要： Disclosed are a semiconductor storage device and a method for manufacturing the semiconductor storage device, whereby the bit cost of memory using a variable resistance material is reduced. The semiconductor storage device has: a substrate; a first word line (2) which is provided above the substrate; a first laminated body, which is disposed above the first word line (2), and which has the N+1 (N≧1) number of first inter-gate insulating layers (11-15) and the N number of first semiconductor layers (21p-24p) alternately laminated in the height direction of the substrate; a first bit line (3), which extends in the direction that intersects the first word line (2), and which is disposed above the laminated body; a first gate insulating layer (9) which is provided on the side surface of the N+1 number of the first inter-gate insulating layers (11-15) and those of the N number of the first semiconductor layers (21p-24p); a first channel layer (8p) which is provided on the side surface of the first gate insulating layer (9); and a first variable resistance material layer (7) which is provided on the side surface of the first channel layer. The first variable material layer (7) is in a region where the first word line (2) and the first bit line (3) intersect each other. Furthermore, a polysilicon diode (PD) is used as a selection element.

摘要翻译： 公开了一种半导体存储装置和用于制造半导体存储装置的方法，由此降低了使用可变电阻材料的存储器的位成本。 半导体存储装置具有：基板; 设置在基板上方的第一字线（2） 第一层叠体，其设置在第一字线（2）的上方，并且具有N + 1（N≥1）个第一栅极间绝缘层（11-15）和N个第一半导体层 （21p-24p）在基板的高度方向上交替层叠; 第一位线（3），其在与所述第一字线（2）相交的方向上延伸，并且位于所述层叠体的上方; 设置在N + 1个第一栅极绝缘层（11-15）的侧表面和N个第一半导体层（21p-24p）的侧表面上的第一栅极绝缘层（9） ; 设置在第一栅极绝缘层（9）的侧面上的第一沟道层（8p）; 以及设置在第一沟道层的侧表面上的第一可变电阻材料层（7）。 第一可变材料层（7）在第一字线（2）和第一位线（3）彼此相交的区域中。 此外，使用多晶硅二极管（PD）作为选择元件。