公开(公告)号：US08580681B2

公开(公告)日：2013-11-12

申请号：US13553916

申请日：2012-07-20

申请人： Nobuyuki Sako

发明人： Nobuyuki Sako

IPC分类号： H01L21/44

CPC分类号： H01L21/76898 ,  H01L27/10808 ,  H01L28/90

摘要： A device manufacturing method includes: sequentially forming a first sacrificial film, a first support film, a second sacrificial film, and a second support film on a semiconductor substrate; forming a hole to pass through these films; forming a crown-shaped electrode covering an inner surface of the hole and connected to the second support film and the first support film; forming a first opening in the second support film into a first pattern designed such that the connection between the crown-shaped electrode and the second support film is at least partially maintained; removing at least a part of the second sacrificial film through the first opening; forming a second opening in the first support film with use of the first opening; and removing the first sacrificial film through the second opening. This method is able to prevent misalignment of openings between the support films.

公开(公告)号：US20130029470A1

公开(公告)日：2013-01-31

申请号：US13280037

申请日：2011-10-24

申请人： Nana HATAYA ,  Nobuyuki SAKO ,  Hiroki YAMAWAKI ,  Shun FUJIMOTO ,  Jiro MIYAHARA

发明人： Nana HATAYA ,  Nobuyuki SAKO ,  Hiroki YAMAWAKI ,  Shun FUJIMOTO ,  Jiro MIYAHARA

IPC分类号： H01L21/02 ,  H01L21/44

CPC分类号： H01L28/90 ,  H01L27/10852 ,  H01L27/10894

摘要： A method of forming a semiconductor device includes the following processes. A dummy insulating film is formed over a semiconductor substrate by using a source material that is free of carbon as an essential component. A hole that penetrates the dummy insulating film is formed. A conductive film is formed, which covers at least a side wall of the hole of the dummy insulating film. The dummy insulating film is removed to expose an outer surface of the conductive film.

摘要翻译： 形成半导体器件的方法包括以下处理。 通过使用不含碳的源材料作为必要成分，在半导体衬底上形成虚拟绝缘膜。 形成穿透虚拟绝缘膜的孔。 形成导电膜，其覆盖虚拟绝缘膜的孔的至少一个侧壁。 去除虚设绝缘膜以露出导电膜的外表面。

公开(公告)号：US20130011988A1

公开(公告)日：2013-01-10

申请号：US13533487

申请日：2012-06-26

申请人： Nobuyuki SAKO

发明人： Nobuyuki SAKO

IPC分类号： H01L21/02

CPC分类号： H01L28/91 ,  H01L27/10852 ,  H01L27/10894

摘要： A semiconductor device has memory cell portions and compensation capacitance portions on a single substrate. The memory cell portion and the compensation capacitance portion have mutually different planar surface areas. The memory cell portion and the compensation capacitance portion include capacitance plate electrodes of the same structure. The capacitance plate electrode has a laminated structure including a boron-doped silicon germanium film and a metal film.

摘要翻译： 半导体器件在单个衬底上具有存储单元部分和补偿电容部分。 存储单元部分和补偿电容部分具有相互不同的平面表面积。 存储单元部分和补偿电容部分包括具有相同结构的电容平板电极。 电容平板电极具有包含硼掺杂硅锗膜和金属膜的叠层结构。

公开(公告)号：US20150333117A1

公开(公告)日：2015-11-19

申请号：US14651633

申请日：2013-12-10

申请人： Nobuyuki Sako ,  Eiji Hasunuma ,  Keisuke Otsuka

发明人： Nobuyuki Sako ,  Eiji Hasunuma ,  Keisuke Otsuka

IPC分类号： H01L49/02 ,  H01L27/108 ,  H01L21/311

CPC分类号： H01L28/90 ,  H01L21/02063 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L27/10805 ,  H01L27/10852 ,  H01L28/91

摘要： One semiconductor device includes lower electrodes arranged in rows along first and second directions parallel to the surface of a semiconductor substrate and extending in a third direction perpendicular to the surface of the substrate, a first support film arranged on the upper end of the lower electrodes and having first openings, a second support film arranged in the middle of the lower electrodes in the third direction, and having second openings aligned in a plane in the same pattern as the first openings, a capacitance insulating film covering the surface of the lower electrodes, and upper electrodes covering the surface of the capacitance insulating film. A portion of each of eight lower electrodes contained in two lower electrode unit groups adjacent in the first direction are collectively positioned inside of the first and second openings. A lower electrode unit group is four lower electrodes adjacent in the second direction.

摘要翻译： 一个半导体器件包括沿着平行于半导体衬底的表面的第一和第二方向排成行的下电极，并且在与衬底的表面垂直的第三方向上延伸;第一支撑膜，布置在下电极的上端;以及 具有第一开口，在第三方向上布置在下电极的中间的第二支撑膜，并且具有在与第一开口相同的图案的平面中排列的第二开口;覆盖下电极表面的电容绝缘膜， 覆盖电容绝缘膜表面的上电极。 包含在沿第一方向相邻的两个下电极单元组中的八个下电极中的每一个的一部分共同位于第一和第二开口内部。 下电极单元组是在第二方向上相邻的四个下电极。

公开(公告)号：US09147686B2

公开(公告)日：2015-09-29

申请号：US13271874

申请日：2011-10-12

申请人： Nobuyuki Sako ,  Eiji Hasunuma

发明人： Nobuyuki Sako ,  Eiji Hasunuma

IPC分类号： H01L21/44 ,  H01L27/108 ,  H01L21/768

CPC分类号： H01L27/10894 ,  H01L21/76816 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10888

摘要： A method of forming a semiconductor device includes the following processes. A first interlayer insulating film is formed over a cell transistor and a peripheral transistor. A cell contact hole is formed in the first interlayer insulating film, the cell contact hole reaching the cell transistor. A lower contact plug is formed at a bottom of the cell contact hole. A peripheral contact hole is formed in the first interlayer insulating film, the peripheral contact hole reaching the peripheral transistor. A first peripheral contact plug is simultaneously formed in the peripheral contact hole and an upper contact plug in the cell contact hole, the upper contact plug being disposed on the lower contact plug.

摘要翻译： 形成半导体器件的方法包括以下处理。 在单元晶体管和外围晶体管上形成第一层间绝缘膜。 在第一层间绝缘膜中形成电池接触孔，电池接触孔到达电池晶体管。 下接触塞形成在电池接触孔的底部。 在第一层间绝缘膜中形成周边接触孔，周边接触孔到达周边晶体管。 第一周边接触插塞同时形成在周边接触孔和电池接触孔中的上接触插塞上，上接触插塞设置在下接触插塞上。

公开(公告)号：US20130344674A1

公开(公告)日：2013-12-26

申请号：US13974553

申请日：2013-08-23

申请人： Nobuyuki SAKO

发明人： Nobuyuki SAKO

IPC分类号： H01L49/02

CPC分类号： H01L28/91 ,  H01L27/10852 ,  H01L27/10894

摘要： A semiconductor device has memory cell portions and compensation capacitance portions on a single substrate. The memory cell portion and the compensation capacitance portion have mutually different planar surface areas. The memory cell portion and the compensation capacitance portion include capacitance plate electrodes of the same structure. The capacitance plate electrode has a laminated structure including a boron-doped silicon germanium film and a metal film.

公开(公告)号：US20130052785A1

公开(公告)日：2013-02-28

申请号：US13284152

申请日：2011-10-28

申请人： Tatsuya MASHIKO ,  Shigeru SUGIOKA ,  Nobuyuki SAKO ,  Ryoichi TANABE

发明人： Tatsuya MASHIKO ,  Shigeru SUGIOKA ,  Nobuyuki SAKO ,  Ryoichi TANABE

IPC分类号： H01L21/311 ,  H01L21/02

CPC分类号： H01L21/31056 ,  H01L21/31053 ,  H01L27/0207 ,  H01L27/10817 ,  H01L27/10852 ,  H01L27/10894 ,  H01L28/91

摘要： To reduce dent defects formed in interlayer CMP process on a capacitor array after forming an interlayer insulating film on the capacitor array thicker than the height of a capacitor, the interlayer insulating film on the capacitor array is subjected to a step height reduction etching to form an opening having open end shape in which open end length is elongated compared with an opening having linear open end shape.

摘要翻译： 为了在比电容器的高度形成电容器阵列上形成层间绝缘膜之后，在电容器阵列上形成的层间CMP工艺中形成的凹陷缺陷，对电容器阵列上的层间绝缘膜进行台阶降低蚀刻，形成 具有开口端形状的开口，其中开口端长度与具有线性开口端形状的开口相比是细长的。

公开(公告)号：US20110189828A1

公开(公告)日：2011-08-04

申请号：US12926836

申请日：2010-12-13

申请人： Nobuyuki Sako ,  Eiji Hasunuma ,  Yuki Togashi

发明人： Nobuyuki Sako ,  Eiji Hasunuma ,  Yuki Togashi

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L21/28

摘要： A silicon layer is formed on a silicon substrate by an epitaxial growth, and, then a surface of the silicon layer is oxidized. The surface of the silicon layer is cleaned, to remove foreign material generated on the surface of the silicon layer during the epitaxial growth.

摘要翻译： 通过外延生长在硅衬底上形成硅层，然后硅层的表面被氧化。 在外延生长期间，清洁硅层的表面以除去在硅层的表面上产生的杂质。

公开(公告)号：US20100271343A1

公开(公告)日：2010-10-28

申请号：US12764659

申请日：2010-04-21

申请人： Kenji Nagashima ,  Hirono Tsubota ,  Takahiko Suzuki ,  Nobuyuki Sako ,  Takeshi Kodaira

发明人： Kenji Nagashima ,  Hirono Tsubota ,  Takahiko Suzuki ,  Nobuyuki Sako ,  Takeshi Kodaira

IPC分类号： G06F3/01

CPC分类号： G06F3/0362 ,  G06F3/016 ,  G06F3/0482

摘要： Disclosed is a rotary input device, including: a rotary operation device; a storage section to store screen information correlated to a display order; a display control section for displaying the screen and selection items; an item switch instructing section to switch the selection item; and a screen switch instructing section to switch the displayed screen, wherein the selection item is switched in a predetermined selection order when the rotary operation device rotates in one direction and switched in a reverse order when the rotary operation device rotates in the other direction, and the first screen is switched to the second screen when the rotary operation device rotates in the one direction in a state in which a last first selection item is selected and switched to the first screen when the device rotates in the other direction in the state in which a top second selection item is selected.

摘要翻译： 公开了一种旋转输入装置，包括：旋转操作装置; 存储部，用于存储与显示顺序相关的画面信息; 显示控制部分，用于显示屏幕和选择项目; 项目切换指示部切换选择项; 以及屏幕切换指示部切换显示的画面，其中，当所述旋转操作装置沿着一个方向旋转并且当所述旋转操作装置沿另一方向旋转时以相反的顺序切换时，所述选择项目以预定的选择顺序切换，以及 当旋转操作装置在选择最后的第一选择项目的状态下旋转操作装置在第一屏幕切换到第二屏幕时，当装置在另一方向上旋转时，将其切换到第一屏幕 选择顶部的第二选择项目。

公开(公告)号：US08637376B2

公开(公告)日：2014-01-28

申请号：US13284080

申请日：2011-10-28

申请人： Shigeru Sugioka ,  Nobuyuki Sako ,  Ryoichi Tanabe

发明人： Shigeru Sugioka ,  Nobuyuki Sako ,  Ryoichi Tanabe

IPC分类号： H01L21/20

CPC分类号： H01L27/0207 ,  H01L21/31053 ,  H01L21/31056 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/90

摘要： To reduce dent defects formed in interlayer CMP process on a capacitor array after forming an interlayer insulating film on the capacitor array thicker than the height of a capacitor, the interlayer insulating film on the capacitor array is subjected to a step height reduction etching to form an opening with etching depth Hd, while remaining a first region that is a distance Lr in a horizontal direction from a rising point of a projected portion of the interlayer insulating film periphery to the capacitor array onto a part of the capacitor array, wherein an aspect ratio (Hd/Lr) of the Hd to the Lr is equal to or less than 0.6.

摘要翻译： 为了在比电容器的高度形成电容器阵列上形成层间绝缘膜之后，在电容器阵列上形成的层间CMP工艺中形成的凹陷缺陷，对电容器阵列上的层间绝缘膜进行台阶降低蚀刻，形成 以蚀刻深度Hd打开，同时保持从层间绝缘膜周边的突出部分的上升点到电容器阵列的水平方向上的距离Lr的第一区域到电容器阵列的一部分上，其中纵横比 Hd至Lr的（Hd / Lr）等于或小于0.6。