公开(公告)号：US20080108193A1

公开(公告)日：2008-05-08

申请号：US11593086

申请日：2006-11-06

Applicant: Lu You ,  Alexander Nickel ,  Minh Q. Tran ,  Minh-Van Ngo ,  Hieu Pham ,  Erik Wilson ,  Hirokazu Tokuno ,  Amir Hossein Jafarpour ,  Inkuk Kang ,  Robert Huertas

Inventor： Lu You ,  Alexander Nickel ,  Minh Q. Tran ,  Minh-Van Ngo ,  Hieu Pham ,  Erik Wilson ,  Hirokazu Tokuno ,  Amir Hossein Jafarpour ,  Inkuk Kang ,  Robert Huertas

IPC: H01L21/336 ,  H01L21/44

CPC classification number: H01L21/76883 ,  H01L27/11521

Abstract: Data retention in flash memory devices, such as mirrorbit devices, is improved by reducing the generation and/or diffusion of hydrogen ions during back end processing, such as annealing inlaid Cu. Embodiments include annealing inlaid Cu in an N2 atmosphere containing low H2 or no H2, and at temperatures less than 200° C., e.g., 100° C. to 150° C.

Abstract translation: 通过减少后端处理中的氢离子的产生和/或扩散（例如退火的Cu）来改善闪存器件（例如镜像位装置）中的数据保留。 实施方案包括在含有低H 2 N 2或无H 2 N的N 2 O 2气氛中以及在低于200℃的温度下退火嵌入的Cu， 例如，100℃至150℃

公开(公告)号：US06589408B1

公开(公告)日：2003-07-08

申请号：US10107778

申请日：2002-03-27

Applicant: Pin-Chin Connie Wang ,  Paul R. Besser ,  Sergey D. Lopatin ,  Minh Q. Tran

Inventor： Pin-Chin Connie Wang ,  Paul R. Besser ,  Sergey D. Lopatin ,  Minh Q. Tran

IPC: C23C1435

CPC classification number: C23C14/3414 ,  C23C14/3407

Abstract: A non-planar target can be configured for use in a plasma vapor deposition (PVD) process in which ions bombard the non-planar target and cause alloy atoms present in the non-planar target to be knocked loose and form an alloy film layer. The target includes a top planar section having a first alloy concentration and a side annular section having a second alloy concentration. The side annular section has ends coupled to ends of the top planar section. The first alloy concentration and the second alloy concentration are different.

Abstract translation: 非平面靶可以被配置用于等离子体气相沉积（PVD）工艺，其中离子轰击非平面靶，并使存在于非平面靶中的合金原子被敲击松动并形成合金膜层。 目标包括具有第一合金浓度的顶部平面部分和具有第二合金浓度的侧部环形部分。 侧面环形部分具有端部连接到顶部平面部分的端部。 第一合金浓度和第二合金浓度不同。

公开(公告)号：US06518167B1

公开(公告)日：2003-02-11

申请号：US10123588

申请日：2002-04-16

Applicant: Lu You ,  Matthew S. Buynoski ,  Paul R. Besser ,  Jeremias D. Romero ,  Pin-Chin Connie Wang ,  Minh Q. Tran

Inventor： Lu You ,  Matthew S. Buynoski ,  Paul R. Besser ,  Jeremias D. Romero ,  Pin-Chin Connie Wang ,  Minh Q. Tran

IPC: H01L214763

CPC classification number: H01L21/76849 ,  H01L21/28562 ,  H01L21/76834

Abstract: A method of forming a metal or metal nitride layer interface between a copper layer and a silicon nitride layer can include providing a metal organic gas or metal/metal nitride precursor over a copper layer, forming a metal or metal nitride layer from reactions between the metal organic gas or metal/metal nitride precursor and the copper layer, and depositing a silicon nitride layer over the metal or metal nitride layer and copper layer. The metal or metal nitride layer can provide a better interface adhesion between the silicon nitride layer and the copper layer. The metal layer can improve the interface between the copper layer and the silicon nitride layer, improving electromigration reliability and, thus, integrated circuit device performance.

Abstract translation: 在铜层和氮化硅层之间形成金属或金属氮化物层界面的方法可以包括在铜层上提供金属有机气体或金属/金属氮化物前体，从金属或金属氮化物层之间的反应形成金属或金属氮化物层 有机气体或金属/金属氮化物前体和铜层，以及在金属或金属氮化物层和铜层上沉积氮化硅层。 金属或金属氮化物层可以在氮化硅层和铜层之间提供更好的界面粘合性。 金属层可以改善铜层和氮化硅层之间的界面，提高电迁移可靠性，从而提高集成电路器件的性能。

公开(公告)号：US4926094A

公开(公告)日：1990-05-15

申请号：US162510

申请日：1988-03-01

Applicant: Anders Bondeson ,  Bernhard Isaak ,  Andre Perrenoud ,  Minh Q. Tran

Inventor： Anders Bondeson ,  Bernhard Isaak ,  Andre Perrenoud ,  Minh Q. Tran

IPC: H01J25/02

CPC classification number: H01J25/025

Abstract: This invention relates to a high-performance gyrotron for the production of electromagnetic millimeter or submillimeter waves with a quasi-optical resonator. The latter is formed by two concave mirrors (1, 2) placed mutually opposite one another on an optical axis. For increasing the decoupling efficiency as well as for reducing the radiation into the environment the quasi-optical resonator is placed in a housing (4), which at least in sections is electrically conductive.

Abstract translation: 本发明涉及一种用于制造具有准光谐振器的电磁毫米波或亚毫米波波的高性能陀螺仪。 后者由在光轴上互相相对放置的两个凹面镜（1,2）形成。 为了增加解耦效率以及将辐射减少到环境中，准光学谐振器被放置在壳体（4）中，该壳体（4）至少在部分是导电的。

公开(公告)号：US08735960B2

公开(公告)日：2014-05-27

申请号：US12313134

申请日：2008-11-17

Applicant: Minh Q. Tran ,  Minh-Van Ngo ,  Alexander H. Nickel ,  Sung Jin Kim ,  Simon Chan ,  Ning Cheng

Inventor： Minh Q. Tran ,  Minh-Van Ngo ,  Alexander H. Nickel ,  Sung Jin Kim ,  Simon Chan ,  Ning Cheng

IPC: H01L29/788

CPC classification number: H01L29/7881 ,  H01L23/485 ,  H01L29/66825 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An ultraviolet light absorbent silicon oxynitride layer overlies a memory cell including a pair of source/drains, a gate insulator, a floating gate, a dielectric layer, and a control gate. A conductor is disposed through the silicon oxynitride layer for electrical connection to the control gate, and another conductor is disposed through the silicon oxynitride layer for electrical connection to a source/drain.

Abstract translation: 紫外线吸收剂氮氧化硅层覆盖包括一对源极/漏极，栅极绝缘体，浮动栅极，电介质层和控制栅极的存储单元。 导电体通过硅氧氮化物层设置，用于与控制栅极电连接，并且另一个导体通过氧氮化硅层设置，用于电连接到源极/漏极。

公开(公告)号：US08611035B1

公开(公告)日：2013-12-17

申请号：US13367334

申请日：2012-02-06

Applicant: Sateeshchandra S. Bajikar ,  Minh Q. Tran

Inventor： Sateeshchandra S. Bajikar ,  Minh Q. Tran

IPC: G11B5/56

CPC classification number: G11B5/6017 ,  G11B19/042

Abstract: A proximity sensor is described including a capacitor formed by a first conductive element and a second conductive element. The first conductive element and the second conductive element are situated at a magnetic head, a slider that connects to the magnetic head, a reader of the magnetic head, a writer of the magnetic head, a reader shield of the magnetic head, or a writer shield of the magnetic head. A capacitance and a fringing electric field are formed by the capacitor when there is a voltage difference between the first conductive element and the second conductive element. The capacitor is situated such that the fringing electric field changes with a positioning change of a magnetic storage medium with respect to at least one of the first conductive element and the second conductive element. The capacitor is also situated such that the capacitance changes with the fringing electric field change.

Abstract translation: 描述了一种接近传感器，其包括由第一导电元件和第二导电元件形成的电容器。 第一导电元件和第二导电元件位于磁头，连接到磁头的滑块，磁头的读取器，磁头的写入器，磁头的读取器屏蔽件或写入器 屏蔽磁头。 当第一导电元件和第二导电元件之间存在电压差时，由电容器形成电容和边缘电场。 电容器设置成使得边缘电场相对于第一导电元件和第二导电元件中的至少一个的磁存储介质的定位变化而变化。 电容器也被定位成使得电容随边缘电场变化而变化。

公开(公告)号：US20100123178A1

公开(公告)日：2010-05-20

申请号：US12313134

申请日：2008-11-17

Applicant: Minh Q. Tran ,  Minh-Van Ngo ,  Alexander H. Nickel ,  Sung Jin Kim ,  Simon Chan ,  Ning Cheng

Inventor： Minh Q. Tran ,  Minh-Van Ngo ,  Alexander H. Nickel ,  Sung Jin Kim ,  Simon Chan ,  Ning Cheng

IPC: H01L29/788

CPC classification number: H01L29/7881 ,  H01L23/485 ,  H01L29/66825 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An ultraviolet light absorbent silicon oxynitride layer overlies a memory cell including a pair of source/drains, a gate insulator, a floating gate, a dielectric layer, and a control gate. A conductor is disposed through the silicon oxynitride layer for electrical connection to the control gate, and another conductor is disposed through the silicon oxynitride layer for electrical connection to a source/drain.

Abstract translation: 紫外线吸收剂氮氧化硅层覆盖包括一对源极/漏极，栅极绝缘体，浮动栅极，电介质层和控制栅极的存储单元。 导电体通过硅氧氮化物层设置，用于与控制栅极电连接，并且另一个导体通过氧氮化硅层设置，用于电连接到源极/漏极。

公开(公告)号：US06998337B1

公开(公告)日：2006-02-14

申请号：US10728771

申请日：2003-12-08

Applicant: Minh Q. Tran

Inventor： Minh Q. Tran

IPC: H01L21/44 ,  H01L21/4763

CPC classification number: H01L21/76843 ,  H01L21/2885 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L2221/1089

Abstract: Semiconductor devices with highly reliable Cu interconnects exhibiting reduced resistance are formed by sequentially depositing a seed layer by PVD, depositing a conformal seed layer enhancement film by electroplating, and then thermal annealing the seed layer enhancement film in an inert or reducing atmosphere to expel impurities, enhance film conductivity, reduce film stress, increase film density, and reduce film roughness. Embodiments include single and dual Cu damascene techniques formed in dielectric layers having a dielectric constant no greater than about 3.9.

Abstract translation: 通过PVD顺序沉积种子层，通过电镀沉积保形晶种层增强膜，然后在惰性或还原气氛中对种子层增强膜进行热退火以排除杂质，形成具有降低电阻的高可靠性Cu互连的半导体器件， 提高膜导电性，降低膜应力，增加膜密度，并降低膜粗糙度。 实施例包括在具有不大于约3.9的介电常数的电介质层中形成的单和双Cu镶嵌技术。

公开(公告)号：US06979642B1

公开(公告)日：2005-12-27

申请号：US10628733

申请日：2003-07-28

Applicant: Matthew S. Buynoski ,  Connie Pin-Chin Wang ,  Paul R. Besser ,  Minh Q. Tran

Inventor： Matthew S. Buynoski ,  Connie Pin-Chin Wang ,  Paul R. Besser ,  Minh Q. Tran

IPC: H01L21/283 ,  H01L21/288 ,  H01L21/321 ,  H01L21/768

CPC classification number: H01L21/2885 ,  H01L21/321 ,  H01L21/76877

Abstract: A method of forming a conductive structure such as a copper conductive structure, line, or via is optimized for large grain growth and distribution of alloy elements. The alloy elements can reduce electromigration problems associated with the conductive structure. The conductive structure is self-annealed or first annealed in a low temperature process over a longer period of time. Another anneal is utilized to distribute alloy elements.

Abstract translation: 形成诸如铜导电结构，管线或通孔的导电结构的方法被优化用于合金元件的大晶粒生长和分布。 合金元素可以减少与导电结构相关的电迁移问题。 导电结构在较长时间内在低温过程中自退火或首先退火。 利用另一退火来分配合金元素。

公开(公告)号：US06664187B1

公开(公告)日：2003-12-16

申请号：US10114462

申请日：2002-04-03

Applicant: Minh Van Ngo ,  Minh Q. Tran

Inventor： Minh Van Ngo ,  Minh Q. Tran

IPC: H01L214763

CPC classification number: H01L21/76843 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L2221/1089

Abstract: Semiconductor devices with highly reliable Cu interconnects exhibiting reduced resistance are formed by sequentially depositing a seedlayer by PVD, depositing a conformal seedlayer enhancement film by CVD, and then laser thermal annealing the seedlayer enhancement film in nitrogen to expel impurities, enhance film conductivity, reduce film stress, increase film density, and reduce film roughness. Embodiments include single and dual Cu damascene techniques formed in dielectric layers having a dielectric constant no greater than about 3.9.

Abstract translation: 通过PVD顺序沉积种子层，通过CVD沉积保形籽晶层增强膜，然后通过氮化物激光热退火种子增强膜以排除杂质，增强膜导电性，降低膜，形成具有降低的电阻的具有高可靠性Cu互连的半导体器件 应力，增加膜密度，降低膜粗糙度。 实施例包括在具有不大于约3.9的介电常数的电介质层中形成的单和双Cu镶嵌技术。