公开(公告)号：US07406185B2

公开(公告)日：2008-07-29

申请号：US10414214

申请日：2003-04-16

Applicant: Bruce C. S. Chou ,  Yuan-Wei Cheng ,  Ching-Fu Tsou ,  Ming-Lin Tsai

Inventor： Bruce C. S. Chou ,  Yuan-Wei Cheng ,  Ching-Fu Tsou ,  Ming-Lin Tsai

IPC: G06K9/00 ,  G05B19/00 ,  F25B21/02

CPC classification number: G06K9/0002 ,  G01J5/12

Abstract: The present invention provides a fingerprint sensing mechanism using a two-dimensional thermoelectric sensor array to capture the thermal image related to the ridges and valleys on the finger, wherein its fabricating method is totally compatible with integrated circuits processing. Using the body temperature of a human being as the stimulation source for biometrics, a temperature difference is produced from a ridge of a fingerprint contacting the thermoelectric sensor and the temperature gradient is converted into an electrical signal. A plurality of thermoelectric sensors arranged in a two-dimensional array forms a fingerprint sensor so as to obtain the electrical signal output of the ridge profile of the fingerprint.

Abstract translation: 本发明提供一种使用二维热电传感器阵列捕获与手指上的脊和谷有关的热图像的指纹感测机构，其中其制造方法与集成电路处理完全兼容。 使用人体的体温作为生物测定的刺激源，从与热电传感器接触的指纹的脊产生温差，并将温度梯度转换为电信号。 以二维阵列布置的多个热电传感器形成指纹传感器，以获得指纹的脊形轮廓的电信号输出。

公开(公告)号：US20080084677A1

公开(公告)日：2008-04-10

申请号：US11616661

申请日：2006-12-27

Applicant: Chih-Long Ho ,  Ming-Lin Tsai ,  Kwun-Yao Ho ,  Moriss Kung

Inventor： Chih-Long Ho ,  Ming-Lin Tsai ,  Kwun-Yao Ho ,  Moriss Kung

IPC: H05K7/00

CPC classification number: H01L25/16 ,  H01L23/66 ,  H01L2223/6677 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/19011 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

Abstract: An electronic apparatus including a substrate, a baseband component and an electronic assembly is disclosed. The substrate has a first surface and a second surface opposite to the first surface. The baseband component is disposed on the first surface and electrically connected to the substrate. The electronic assembly includes an integrated passive device and a radio frequency component. The integrated passive device is disposed on the second surface and electrically connected to the substrate. The radio frequency component is disposed on the integrated passive device and electrically connected to the integrated passive device.

Abstract translation: 公开了一种包括基板，基带部件和电子组件的电子设备。 基板具有与第一表面相对的第一表面和第二表面。 基带部件设置在第一表面上并电连接至基板。 电子组件包括集成无源器件和射频部件。 集成无源器件设置在第二表面上并电连接到衬底。 无线电频率分量被布置在集成的无源设备上并电连接到集成无源设备。

公开(公告)号：US07088030B2

公开(公告)日：2006-08-08

申请号：US10839844

申请日：2004-05-06

Applicant: Jerwei Hsieh ,  Huai-Yuan Chu ,  Julius Ming-Lin Tsai ,  Weileun Fang

Inventor： Jerwei Hsieh ,  Huai-Yuan Chu ,  Julius Ming-Lin Tsai ,  Weileun Fang

IPC: H02N1/00 ,  G02B26/08

CPC classification number: H02N1/008 ,  B81B2201/033 ,  B81C1/00595 ,  Y10S438/942

Abstract: A high-aspect-ratio-microstructure (HARM) is provided. The structure includes: a substrate; a lower structure with a comb shape fixedly mounted on said substrate and having first plural comb fingers, wherein each of the first plural comb fingers has a thin slot thereon; an upper structure with a comb shape having second plural comb fingers, wherein the lower structure and the upper structure have a height difference therebetween so as to form an uneven surface; and a lateral strengthening structure formed at vertically peripheral walls of the first plural comb fingers and the second plural comb fingers for protecting the plural first and second comb fingers.

Abstract translation: 提供了高纵横比微结构（HARM）。 该结构包括：基底; 具有固定地安装在所述基板上并具有第一多个梳齿的梳形的下部结构，其中所述第一多个梳齿中的每一个在其上具有薄的狭槽; 具有梳形的具有第二多个梳齿的上部结构，其中下部结构和上部结构之间具有高度差以形成不平坦表面; 以及形成在第一多个梳齿的垂直周壁上的横向加强结构和用于保护多个第一和第二梳齿的第二多个梳齿。

公开(公告)号：US07291918B2

公开(公告)日：2007-11-06

申请号：US11364178

申请日：2006-03-01

Applicant: Ming Lin Tsai ,  Chih-Long Ho

Inventor： Ming Lin Tsai ,  Chih-Long Ho

IPC: H01L23/48

CPC classification number: H01L23/60 ,  H01L23/5222 ,  H01L27/0251 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A layout structure of electrostatic discharge (ESD) protection circuit cooperated with an ESD protection device includes a first electrically conductive layer and a second electrically conductive layer. The first electrically conductive layer is disposed on the ESD protection device and electrically connected to the ESD protection device. The second electrically conductive layer is disposed on the first electrically conductive layer and electrically connected to the first electrically conductive layer. A width or a projection area of the second electrically conductive layer is less than that of the first electrically conductive layer.

Abstract translation: 与ESD保护装置配合的静电放电（ESD）保护电路的布局结构包括第一导电层和第二导电层。 第一导电层设置在ESD保护装置上并电连接到ESD保护装置。 第二导电层设置在第一导电层上并与第一导电层电连接。 第二导电层的宽度或投影面积小于第一导电层的宽度或投影面积。

公开(公告)号：US20080079499A1

公开(公告)日：2008-04-03

申请号：US11536134

申请日：2006-09-28

Applicant: Ming-Lin Tsai

Inventor： Ming-Lin Tsai

IPC: H03F1/22

CPC classification number: H03F3/21 ,  H03F1/223 ,  H03F3/193

Abstract: A power amplifier amplifying an input signal to generate an output signal, comprising a cascode unit and a bias circuit. The cascode unit comprises a cascode stage, a first input stage, and a second input stage. The cascode stage generates the output signal. The first input stage, in cascode with the cascode transistor, has a first signal input to be biased to provide a first amplifier gain. The second input stage, in cascode with the cascode transistor, has a second signal input to be biased to provide a second amplifier gain. The bias circuit, coupled to the first and the second input stages comprises first and second switches. The first switch, coupled to the first input stage, is switched on to bias the first input stage with a bias voltage. The second switch, coupled to the second input stage, is switched on to bias the second input stage with the bias voltage.

Abstract translation: 放大输入信号以产生输出信号的功率放大器，包括共源共同体单元和偏置电路。 共源共栅单元包括共源共栅级，第一输入级和第二输入级。 共源共栅级产生输出信号。 与共源共栅晶体管共源共栅的第一输入级具有被偏置以提供第一放大器增益的第一信号输入。 与共源共栅晶体管共源共栅的第二输入级具有被偏置以提供第二放大器增益的第二信号输入。 耦合到第一和第二输入级的偏置电路包括第一和第二开关。 耦合到第一输入级的第一开关被接通，以偏置第一输入级。 耦合到第二输入级的第二开关被接通，以偏置第二输入级。

公开(公告)号：US07420425B2

公开(公告)日：2008-09-02

申请号：US11536134

申请日：2006-09-28

Applicant: Ming-Lin Tsai

Inventor： Ming-Lin Tsai

IPC: H03F3/04

CPC classification number: H03F3/21 ,  H03F1/223 ,  H03F3/193

Abstract: A power amplifier amplifying an input signal to generate an output signal, comprising a cascode unit and a bias circuit. The cascode unit comprises a cascode stage, a first input stage, and a second input stage. The cascode stage generates the output signal. The first input stage, in cascode with the cascode transistor, has a first signal input to be biased to provide a first amplifier gain. The second input stage, in cascode with the cascode transistor, has a second signal input to be biased to provide a second amplifier gain. The bias circuit, coupled to the first and the second input stages comprises first and second switches. The first switch, coupled to the first input stage, is switched on to bias the first input stage with a bias voltage. The second switch, coupled to the second input stage, is switched on to bias the second input stage with the bias voltage.

Abstract translation: 放大输入信号以产生输出信号的功率放大器，包括共源共同体单元和偏置电路。 共源共栅单元包括共源共栅级，第一输入级和第二输入级。 共源共栅级产生输出信号。 与共源共栅晶体管共源共栅的第一输入级具有被偏置以提供第一放大器增益的第一信号输入。 与共源共栅晶体管共源共栅的第二输入级具有被偏置以提供第二放大器增益的第二信号输入。 耦合到第一和第二输入级的偏置电路包括第一和第二开关。 耦合到第一输入级的第一开关被接通，以偏置第一输入级。 耦合到第二输入级的第二开关被接通，以偏置第二输入级。

公开(公告)号：US07247247B2

公开(公告)日：2007-07-24

申请号：US10839990

申请日：2004-05-06

Applicant: Jerwei Hsieh ,  Huai-Yuan Chu ,  Julius Ming-Lin Tsai ,  Weileun Fang

Inventor： Jerwei Hsieh ,  Huai-Yuan Chu ,  Julius Ming-Lin Tsai ,  Weileun Fang

IPC: B81C1/00

CPC classification number: H02N1/008 ,  B81B2201/033 ,  B81C1/00595 ,  Y10S438/942

Abstract: A selective etching method with lateral protection function is provided. The steps includes: (a) providing a substrate; (b) forming a plurality of tunnels; (c) forming a lateral strengthening structure at a peripheral wall of the tunnels; (d) removing a bottom portion of the lateral strengthening structure, and a part of the substrate by an etching process so as to form a lower structure and expose an unstrengthened structure; and (f) etching the unstrengthened structure laterally so as to form an upper structure.

Abstract translation: 提供了具有侧向保护功能的选择性蚀刻方法。 步骤包括：（a）提供基底; （b）形成多个隧道; （c）在隧道的周壁处形成横向加固结构; （d）通过蚀刻工艺去除侧向强化结构的底部和基底的一部分，以形成下部结构并暴露未加强的结构; 和（f）横向蚀刻非强化结构以形成上部结构。