知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

6 records (took 0.011 seconds)

    Memory base cell and memory bank
    1.
    发明授权
    Memory base cell and memory bank 有权
    存储器单元和存储体

    公开(公告)号：US08411492B2

    公开(公告)日：2013-04-02

    申请号：US13097502

    申请日：2011-04-29

    Applicant: Valentina Nardone ,  Stefano Pucillo ,  Roberto Canegallo ,  Claudio Mucci ,  Massimiliano Innocenti ,  Luca Perugini

    Inventor： Valentina Nardone ,  Stefano Pucillo ,  Roberto Canegallo ,  Claudio Mucci ,  Massimiliano Innocenti ,  Luca Perugini

    IPC: G11C11/00 ,  G11C7/10 ,  G11C8/00

    CPC classification number: G11C11/412 ,  Y10T29/49069

    Abstract: A memory base cell stores a bit of information implemented from a regular and compact structure made up of multiple identical and replicated base elements, on the “sea of gates” model, in which the base element of the structure is a cell able to be configured with a minimum width in relation to the particular technology used. Such a cell includes a bistable element with an input node operatively connected to a writing data line of the memory base cell, and an output node operatively connected to a reading data line of the memory base cell. The bistable element also has a first inverter and a second inverter arranged in a feedback configuration with respect to one another between the input node and the output node of the bistable element.

    Abstract translation: 存储器单元存储从由多个相同和复制的基本元件组成的规则和紧凑的结构实现的信息位，在门模型的海上，其中该结构的基本元件是能够被配置为具有 相对于所使用的特定技术的最小宽度。 这种单元包括双稳态元件，其输入节点可操作地连接到存储器基本单元的写入数据线，以及可操作地连接到存储器基本单元的读取数据线的输出节点。 双稳态元件还具有在双稳态元件的输入节点和输出节点之间相对于彼此布置成反馈配置的第一反相器和第二反相器。

    Base cell for implementing an engineering change order (ECO)
    2.
    发明授权
    Base cell for implementing an engineering change order (ECO) 有权
    用于实施工程变更单（ECO）的基本单元

    公开(公告)号：US08390330B2

    公开(公告)日：2013-03-05

    申请号：US13096297

    申请日：2011-04-28

    Applicant: Luca Ciccarelli ,  Roberto Canegallo ,  Claudio Mucci ,  Massimiliano Innocenti ,  Valentina Nardone

    Inventor： Luca Ciccarelli ,  Roberto Canegallo ,  Claudio Mucci ,  Massimiliano Innocenti ,  Valentina Nardone

    IPC: H01L25/00 ,  H01L27/118

    CPC classification number: G06F17/5068

    Abstract: A circuit base cell is for implementing an engineering change order (ECO) obtained on a semiconductor substrate. The base cell may include a PMOS transistor having a first active region obtained in a first diffusion P+ layer implanted in an N-well provided for on the substrate, and an NMOS transistor having a second active region obtained in a second diffusion N+ layer implanted on the substrate in such a manner as to be electrically insulated from the first diffusion P+ layer. The cell may be characterized in that the active regions and the diffusion layers are aligned therebetween with respect to a reference axis and they are extended symmetrically in the direction orthogonal to the axis. A first and a second width may be associated with the active regions and to the diffusion layers, respectively. The first and second width may be greater than a width of the cell, which is equivalent to a pitch of the standard minimum cell.

    Abstract translation: 电路基座用于实现在半导体衬底上获得的工程改变顺序（ECO）。 基体单元可以包括具有第一有源区的PMOS晶体管，该第一有源区在植入在衬底上设置的N阱中的第一扩散P +层中，以及NMOS晶体管，其具有在第二扩散N +层中所获得的第二有源区， 该衬底以与第一扩散P +层电绝缘的方式。 电池的特征在于有源区域和扩散层相对于参考轴线在其间对准，并且它们在与轴线正交的方向上对称延伸。 第一和第二宽度可以分别与有源区域和扩散层相关联。 第一和第二宽度可以大于单元的宽度，其等于标准最小单元的间距。

    MEMORY BASE CELL AND MEMORY BANK
    3.
    发明申请
    MEMORY BASE CELL AND MEMORY BANK 有权
    存储基础单元和存储器银行

    公开(公告)号：US20120075920A1

    公开(公告)日：2012-03-29

    申请号：US13097502

    申请日：2011-04-29

    Applicant: Valentina NARDONE ,  Stefano Pucillo ,  Roberto Canegallo ,  Claudio Mucci ,  Massimiliano Innocenti ,  Luca Perugini

    Inventor： Valentina NARDONE ,  Stefano Pucillo ,  Roberto Canegallo ,  Claudio Mucci ,  Massimiliano Innocenti ,  Luca Perugini

    IPC: G11C11/00 ,  H01F41/00

    CPC classification number: G11C11/412 ,  Y10T29/49069

    Abstract: A memory base cell stores a bit of information implemented from a regular and compact structure made up of multiple identical and replicated base elements, on the “sea of gates” Model, in which the base element of the structure is a cell able to be configured with a minimum width in relation to the particular technology used. Such a cell includes a bistable element with an input node operatively connected to a writing data line of the memory base cell, and an output node operatively connected to a reading data line of the memory base cell. The bistable element also has a first inverter and a second inverter arranged in a feedback configuration with respect to one another between the input node and the output node of the bistable element.

    Abstract translation: 存储器基座存储从“多数相同和复制的基本元件”构成的规则紧凑的结构实现的信息位，在“海上大门”模型中，其中该结构的基本元件是能够被配置的单元 相对于所使用的特定技术具有最小宽度。 这种单元包括双稳态元件，其输入节点可操作地连接到存储器基本单元的写入数据线，以及可操作地连接到存储器基本单元的读取数据线的输出节点。 双稳态元件还具有在双稳态元件的输入节点和输出节点之间相对于彼此布置成反馈配置的第一反相器和第二反相器。

    BASE CELL FOR IMPLEMENTING AN ENGINEERING CHANGE ORDER (ECO)
    4.
    发明申请
    BASE CELL FOR IMPLEMENTING AN ENGINEERING CHANGE ORDER (ECO) 有权
    实施工程变更订单（ECO）的基础单元

    公开(公告)号：US20120001655A1

    公开(公告)日：2012-01-05

    申请号：US13096297

    申请日：2011-04-28

    Applicant: Luca CICCARELLI ,  Roberto Canegallo ,  Claudio Mucci ,  Massimiliano Innocenti ,  Valentina Nardone

    Inventor： Luca CICCARELLI ,  Roberto Canegallo ,  Claudio Mucci ,  Massimiliano Innocenti ,  Valentina Nardone

    IPC: H03K19/0948 ,  H01L27/088 ,  H01L21/8234 ,  H01L27/092

    CPC classification number: G06F17/5068

    Abstract: A circuit base cell is for implementing an engineering change order (ECO) obtained on a semiconductor substrate. The base cell may include a PMOS transistor having a first active region obtained in a first diffusion P+ layer implanted in an N-well provided for on the substrate, and an NMOS transistor having a second active region obtained in a second diffusion N+ layer implanted on the substrate in such a manner as to be electrically insulated from the first diffusion P+ layer. The cell may be characterized in that the active regions and the diffusion layers are aligned therebetween with respect to a reference axis and they are extended symmetrically in the direction orthogonal to the axis. A first and a second width may be associated with the active regions and to the diffusion layers, respectively. The first and second width may be greater than a width of the cell, which is equivalent to a pitch of the standard minimum cell.

    Abstract translation: 电路基座用于实现在半导体衬底上获得的工程改变顺序（ECO）。 基体单元可以包括具有第一有源区的PMOS晶体管，该第一有源区在植入在衬底上提供的N阱中的第一扩散P +层中，以及NMOS晶体管，其具有在第二扩散N +层中所获得的第二有源区， 该衬底以与第一扩散P +层电绝缘的方式。 电池的特征在于有源区域和扩散层相对于参考轴线在其间对准，并且它们在与轴线正交的方向上对称延伸。 第一和第二宽度可以分别与有源区域和扩散层相关联。 第一和第二宽度可以大于单元的宽度，其等于标准最小单元的间距。

Patent Agency Ranking