Abstract:
The software on the host machine examines a pixel, either alone or in relation to adjacent pixels. Based on the image data contained in the pixel or group of pixels, a multi-bit value is generated that can be used by the printing device to easily reproduce the necessary detail of the original pixel. The multi-bit value also contains print engine control parameters to handle items such as toner miser mode, toner explosion, edge roll off, etc. The multi-bit value can be generated algorithmically by using a lookup table or by some combination of these methods.
Abstract:
An image forming apparatus, which may be a printer, includes an image acquisition subsystem and a processing subsystem. The image acquisition subsystem includes an imager and a source. The imager is configured to scan an image while the image acquisition subsystem moves with respect to the image forming apparatus and configured to provide electrical signals including information related to the scanned image. The source is configured to emanate electromagnetic radiation based on the electrical signals. The processing subsystem includes a receiving component configured to receive the electromagnetic radiation emanated from the source of the image acquisition subsystem. The image forming apparatus also includes a structure supporting both the image acquisition subsystem and the processing subsystem.
Abstract:
A printing system comprises a memory configured to store image data representing an image. The printing system comprises a processor configured to perform a first digital halftone process on a first portion of the image and a second digital halftone process on a second portion of the image.
Abstract:
A system comprising a processor and a memory comprising firmware is provided. The firmware is executable by the processor to cause the processor to operate a print mechanism in accordance with a first state associated with a capability of the print mechanism, change the first state associated with the capability to a second state in response to receiving first information from an external interface, and operate the print mechanism in accordance with the second state associated with the capability.
Abstract:
A system comprising a processor and a memory comprising firmware is provided. The firmware is executable by the processor to cause the processor to operate a print mechanism in accordance with a first state associated with a capability of the print mechanism, change the first state associated with the capability to a second state in response to receiving first information from an external interface, and operate the print mechanism in accordance with the second state associated with the capability.
Abstract:
A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implemented using a few terminals of the ASIC.
Abstract:
A laser scanning assembly generates a laser beam and scans the laser beam through a plurality of scan lines to form desired dots. Each scan line is positioned to overlap an adjacent scan line and each dot includes a plurality of segments. The scanning assembly scans the laser beam through multiple scan lines to fully discharge each segment of each dot. The laser scanner assembly would typically be part of a laser printer.
Abstract:
A printing system comprises a memory configured to store image data representing an image. The printing system comprises a processor configured to perform a first digital halftone process on a first portion of the image and a second digital halftone process on a second portion of the image.
Abstract:
A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implemented using a few terminals of the ASIC.
Abstract:
A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.