公开(公告)号：US20140327012A1

公开(公告)日：2014-11-06

申请号：US14111163

申请日：2012-04-16

Applicant: Abdallah Ougazzaden ,  Marie-Antoinette Poisson ,  Vinod Ravindran ,  Ali Soltani ,  Jean-Claude De Jaeger

Inventor： Abdallah Ougazzaden ,  Marie-Antoinette Poisson ,  Vinod Ravindran ,  Ali Soltani ,  Jean-Claude De Jaeger

IPC: H01L29/778 ,  H01L29/205

CPC classification number: H01L29/7787 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02507 ,  H01L21/0254 ,  H01L23/291 ,  H01L23/3171 ,  H01L29/04 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/7783 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic HEMT transistor structure comprises a heterojunction formed from a first layer, called a buffer layer, of a first wide bandgap semiconductor material, and a second layer of a second wide bandgap semiconductor material, with a bandgap width EG2 larger than that Eg1 of the first material, and a two-dimensional electron gas flowing in a channel confined in the first layer under the interface of the heterojunction. The first layer furthermore comprises a layer of a BGaN material under the channel, with an average boron concentration of at least 0.1%, improving the electrical performance of the transistor. Application to microwave power components.

Abstract translation: 电子HEMT晶体管结构包括由第一宽带隙半导体材料的第一层（称为缓冲层）和第二宽带隙半导体材料的第二层形成的异质结，其带隙宽度EG2大于 第一材料和在限制在第一层的异质结界面下的通道中流动的二维电子气。 第一层还包括在沟道下方的BGaN材料层，其平均硼浓度至少为0.1％，改善了晶体管的电性能。 应用于微波功率元件。

公开(公告)号：US09305734B2

公开(公告)日：2016-04-05

申请号：US14234328

申请日：2012-07-20

Applicant: Jean-Claude Jacquet ,  Raphaël Aubry ,  Marie-Antoinette Poisson ,  Sylvain Delage

Inventor： Jean-Claude Jacquet ,  Raphaël Aubry ,  Marie-Antoinette Poisson ,  Sylvain Delage

IPC: H01J1/308 ,  H01J23/04

CPC classification number: H01J1/308 ,  H01J23/04

Abstract: A semiconductor device for electron emission in a vacuum comprises a stack of two or more semi-conductor layers of N and P type according to sequence N/(P)/N forming a juxtaposition of two head-to-tail NP junctions, in materials belonging to the III-N family, two adjacent layers forming an interface. The semiconductor materials of the layers of the stack close to the vacuum, where the electrons reach a high energy, have a band gap Eg>c/2, where c is the electron affinity of the semiconductor material, the P-type semiconductor layer being obtained partially or completely, by doping impurities of acceptor type or by piezoelectric effect to exhibit a negative fixed charge in any interface between the layers, a positive bias potential applied to the stack supplying, to a fraction of electrons circulating in the stack, the energy needed for emission in the vacuum by an emissive zone of an output layer.

Abstract translation: 用于真空中电子发射的半导体器件包括根据序列N /（P）/ N的两个或多个N型和P型半导体层的堆叠，形成两个头对尾NP连接的并置，材料 属于III-N族，两个相邻的层形成界面。 靠近真空的堆叠层的半导体材料，其中电子达到高能量，具有带隙Eg> c / 2，其中c是半导体材料的电子亲和力，P型半导体层是 通过掺杂受体类型的杂质或通过压电效应来获得部分或完全地获得，以在层之间的任何界面中显示负的固定电荷，施加到堆叠的积极偏置电势提供给堆叠中循环的一部分电子， 需要通过输出层的发射区在真空中发射。

公开(公告)号：US20140326943A1

公开(公告)日：2014-11-06

申请号：US14234328

申请日：2012-07-20

Applicant: Jean-Claude Jacquet ,  Raphaël Aubry ,  Marie-Antoinette Poisson ,  Sylvain Delage

Inventor： Jean-Claude Jacquet ,  Raphaël Aubry ,  Marie-Antoinette Poisson ,  Sylvain Delage

IPC: H01J1/308

CPC classification number: H01J1/308 ,  H01J23/04

Abstract: A semiconductor device for electron emission in a vacuum comprises a stack of two or more semi-conductor layers of N and P type according to sequence N/(P)/N forming a juxtaposition of two head-to-tail NP junctions, in materials belonging to the III-N family, two adjacent layers forming an interface. The semiconductor materials of the layers of the stack close to the vacuum, where the electrons reach a high energy, have a band gap Eg>c/2, where c is the electron affinity of the semiconductor material, the P-type semiconductor layer being obtained partially or completely, by doping impurities of acceptor type or by piezoelectric effect to exhibit a negative fixed charge in any interface between the layers, a positive bias potential applied to the stack supplying, to a fraction of electrons circulating in the stack, the energy needed for emission in the vacuum by an emissive zone of an output layer.

Abstract translation: 用于真空中电子发射的半导体器件包括根据序列N /（P）/ N的两个或多个N型和P型半导体层的堆叠，形成两个头对尾NP结的并置，材料 属于III-N族，两个相邻的层形成界面。 靠近真空的堆叠层的半导体材料，其中电子达到高能量，具有带隙Eg> c / 2，其中c是半导体材料的电子亲和力，P型半导体层是 通过掺杂受体类型的杂质或通过压电效应来获得部分或完全地获得，以在层之间的任何界面中显示负的固定电荷，施加到堆叠的积极偏置电势提供给堆叠中循环的一部分电子， 需要通过输出层的发射区在真空中发射。

公开(公告)号：US5194403A

公开(公告)日：1993-03-16

申请号：US769837

申请日：1991-10-02

Applicant: Sylvain Delage ,  Philippe Collot ,  Marie-Antoinette Poisson

Inventor： Sylvain Delage ,  Philippe Collot ,  Marie-Antoinette Poisson

IPC: H01L21/28 ,  H01L21/306 ,  H01L21/331 ,  H01L21/60 ,  H01L29/73 ,  H01L29/737

CPC classification number: H01L21/76897 ,  H01L21/28 ,  H01L21/30621 ,  H01L29/66318

Abstract: The aim of the method is to prevent parasitic metallizations on the lateral walls of a raised pattern, which is used to self-align the electrode metallizations in a transistor. To this effect, a pair of semiconductor materials is introduced into the vertical pattern. These semiconductor materials react differently with respect to a pair of etching methods, so that a layer of one semiconductor material is etched to a greater extent than the other layer. The overhanging feature thus created interrupts the parasitic metallizations, if any, between the electrodes. The disclosed method can be applied to vertical structures.

Abstract translation: 该方法的目的是防止凸起图案的侧壁上的寄生金属化，其用于自对准晶体管中的电极金属化。 为此，将一对半导体材料引入垂直图案。 这些半导体材料相对于一对蚀刻方法反应不同，使得一层半导体材料的层被蚀刻到比另一层更大的程度。 由此产生的突出特征中断了电极之间的寄生金属化（如果有的话）。 所公开的方法可以应用于垂直结构。

公开(公告)号：US5668388A

公开(公告)日：1997-09-16

申请号：US674564

申请日：1996-07-05

Applicant: Sylvain Delage ,  Marie-Antoinette Poisson ,  Christian Brylinski ,  Herve Blanck

Inventor： Sylvain Delage ,  Marie-Antoinette Poisson ,  Christian Brylinski ,  Herve Blanck

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/08 ,  H01L29/205 ,  H01L29/737 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC classification number: H01L29/0804 ,  H01L29/7371

Abstract: A bipolar transistor in which the emitter possesses a double "mesa" structure so as to achieve the maximum avoidance of the phenomena of electron/hole recombinations that have a deleterious effect on the current gain. The double mesa emitter can be made out of an alternation of materials M.sub.I /M.sub.II having different types of behavior with respect to a pair of etching methods. These materials may be GaInP and GaAs.

Abstract translation: 一种双极晶体管，其中发射极具有双“台面”结构，以便最大限度地避免对电流增益产生有害影响的电子/空穴复合现象。 双台面发射器可以由相对于一对蚀刻方法具有不同类型行为的材料MI / MII的交替构成。 这些材料可以是GaInP和GaAs。