公开(公告)号：US20040253784A1

公开(公告)日：2004-12-16

申请号：US10893659

申请日：2004-07-16

Applicant: LSI Logic Corporation

Inventor： Hong-Qiang Lu ,  Wei-Jen Hsia ,  Wilbur G. Catabay

IPC: H01L021/8238

CPC classification number: H01L21/76829 ,  H01L21/31144 ,  H01L21/3148 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76832

Abstract: Provided is a process for forming a barrier film to prevent resist poisoning in a semiconductor device by depositing a second nitrogen-free barrier layer on top of a first barrier layer containing nitrogen. A low-k dielectric layer is formed over the second barrier layer. This technique maintains the low electrical leakage characteristics of the first barrier layer and reduces nitrogen poisoning of a photoresist layer subsequently applied.

公开(公告)号：US20040252760A1

公开(公告)日：2004-12-16

申请号：US10461780

申请日：2003-06-13

Applicant: LSI LOGIC CORPORATION

Inventor： Lowell L. Winger

IPC: H04N007/12

CPC classification number: H04N19/593 ,  H04N19/105 ,  H04N19/139 ,  H04N19/176 ,  H04N19/51 ,  H04N19/61

Abstract: An apparatus comprising a first processing circuit and a second processing circuit. The first processing circuit may be configured to generate (i) one or more prediction samples and (ii) a plurality of macroblocks, in response to each frame of an input video signal. The second processing circuit may be configured to (i) select one or more reference indices for each of the macroblocks from one or more sets of reference indices and (ii) generate said one or more prediction samples in response to said selected reference indices. Each of the selected reference indices is generally determined based upon minimum and maximum values for each of the one or more sets of reference indices.

Abstract translation: 一种装置，包括第一处理电路和第二处理电路。 第一处理电路可以被配置为响应于输入视频信号的每个帧产生（i）一个或多个预测样本和（ii）多个宏块。 第二处理电路可以被配置为（i）从一个或多个参考索引组中选择一个或多个参考索引，以及（ii）响应于所选择的参考索引生成所述一个或多个预测样本。 所选择的参考索引中的每一个通常基于一组或多组参考索引中的每一个的最小值和最大值来确定。

公开(公告)号：US20040252127A1

公开(公告)日：2004-12-16

申请号：US10458157

申请日：2003-06-10

Applicant: LSI LOGIC CORPORATION

Inventor： Elliot N. Linzer ,  Ho-Ming Leung

IPC: G06F013/00

CPC classification number: H04N19/186 ,  H04N19/423

Abstract: A method for storing data of a plurality of components of an image in a memory system with four banks comprising the steps of (A) placing a first portion of data of a first component of the plurality of components into a first bank of the four banks and (B) placing a second portion of the data of the first component in a second bank of the four banks, where all of the data of the first component is stored in the first and second banks and occupies at least three pages in the memory system.

Abstract translation: 一种在具有四个存储体的存储器系统中存储图像的多个分量的数据的方法，包括以下步骤：（A）将多个分量的第一分量的第一部分的数据的第一部分放置在四个组中的第一组中 和（B）将第一组件的数据的第二部分放置在四个组的第二组中，其中第一组件的所有数据都存储在第一组和第二组中，并且在存储器中占据至少三页 系统。

公开(公告)号：US20040190616A1

公开(公告)日：2004-09-30

申请号：US10397401

申请日：2003-03-26

Applicant: LSI LOGIC CORPORATION

Inventor： Elliot N. Linzer ,  Aaron G. Wells

IPC: H04N007/12

CPC classification number: H04N19/51 ,  H04N19/57

Abstract: An apparatus comprising a first circuit, a second circuit and a third circuit. The first circuit may be configured to generate a plurality of first motion vectors and first error scores in response to a search of a macroblock of an image. The search generally comprises a range of motion vectors of the macroblock. The second circuit may be configured to generate a plurality of second motion vectors and second error scores for a plurality of sub-blocks of the macroblock in response to a set of discrete candidate motion vectors selected from the plurality of first motion vectors. The third circuit may be configured to segment the macroblock in response to (i) the plurality of first motion vectors and first error scores and (ii) the plurality of second motion vectors and second error scores.

Abstract translation: 一种包括第一电路，第二电路和第三电路的装置。 第一电路可以被配置为响应于图像的宏块的搜索而生成多个第一运动矢量和第一误差分数。 搜索通常包括宏块的运动矢量的范围。 第二电路可以被配置为响应于从多个第一运动矢量中选择的一组离散的候选运动矢量而产生用于宏块的多个子块的多个第二运动矢量和第二误差分数。 第三电路可以被配置为响应于（i）多个第一运动矢量和第一误差分数和（ii）多个第二运动矢量和第二误差分数来分段宏块。

公开(公告)号：US20040125807A1

公开(公告)日：2004-07-01

申请号：US10316344

申请日：2002-12-11

Applicant: LSI LOGIC CORPORATION

Inventor： Hongping Liu ,  Zhiqiang J. Su

IPC: H04L012/28

CPC classification number: H04L69/16 ,  H04L69/167

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a plurality of match signals in response to an incoming data signal. Each match signal is generated in response to different search criteria. The second circuit may be configured to present a protocol indication signal in response to the plurality of match signals.

Abstract translation: 一种包括第一电路和第二电路的装置。 第一电路可以被配置为响应于输入数据信号而产生多个匹配信号。 响应于不同的搜索标准产生每个匹配信号。 第二电路可以被配置为响应于多个匹配信号呈现协议指示信号。

公开(公告)号：US20040100577A1

公开(公告)日：2004-05-27

申请号：US10306749

申请日：2002-11-27

Applicant: LSI LOGIC CORPORATION

Inventor： Elliot N. Linzer ,  Ho-Ming Leung

IPC: H04N005/66 ,  H04N009/12

CPC classification number: H04N5/145 ,  G11C7/16 ,  H04N11/044

Abstract: An apparatus and method for storing image data comprising a first storage device and a second storage device. The first storage device may be configured to store at least one first pixel from a first field of a frame of the image at a first physical address in the first storage device. The second storage device may be configured to store a second pixel from a second field of the frame of the image at a second physical address in the second storage device. The first and second physical addresses may have the same relative position in an address space of the respective storage devices.

Abstract translation: 一种用于存储包括第一存储装置和第二存储装置的图像数据的装置和方法。 第一存储设备可以被配置为在第一存储设备中的第一物理地址处存储来自图像的帧的第一字段的至少一个第一像素。 第二存储设备可以被配置为在第二存储设备中的第二物理地址处从图像的帧的第二字段存储第二像素。 第一和第二物理地址可以在各个存储设备的地址空间中具有相同的相对位置。

公开(公告)号：US20040089938A1

公开(公告)日：2004-05-13

申请号：US10694486

申请日：2003-10-27

Applicant: LSI Logic Corporation

Inventor： Derryl D.J. Allman ,  David T. Price

IPC: H01L023/48 ,  H01L023/52

CPC classification number: H01L24/11 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05093 ,  H01L2224/05095 ,  H01L2224/13099 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/30105 ,  Y10T29/49155

Abstract: A bonding pad for an integrated circuit, having a conductive base layer. The conductive base layer has slots formed in it, where the slots extend completely through the conductive base layer. An insulating layer is disposed on top of the conductive base layer. The insulating layer protrudes into the slots of the conductive base layer. The insulating layer also includes a low k material. A conductive top layer is disposed on top of the insulating layer.

Abstract translation: 一种用于集成电路的焊盘，具有导电基底层。 导电基层具有在其中形成的槽，其中狭槽完全延伸穿过导电基层。 绝缘层设置在导电基底层的顶部。 绝缘层突出到导电基底层的槽中。 绝缘层还包括低k材料。 导电顶层设置在绝缘层的顶部。

公开(公告)号：US20040089887A1

公开(公告)日：2004-05-13

申请号：US10643687

申请日：2003-08-19

Applicant: LSI Logic Corporation

Inventor： Sheldon Aronowitz ,  Vladimir Zubkov ,  Grace Sun

IPC: H01L029/76

CPC classification number: H01L29/517 ,  C23C16/40 ,  H01L21/28194 ,  H01L21/31604 ,  H01L21/31683

Abstract: A new relatively high-k gate dielectric gate material comprising calcium oxide will reduce leakage from the silicon substrate to the polysilicon gate, prevent boron penetration in p-channel devices, and reduce electron trapping in the dielectric. The surface of a silicon wafer is saturated with hydroxyl groups. A calcium halide, preferably calcium bromide, is heated to a temperature sufficient to achieve atomic layer deposition, and is transported to the silicon wafer. The calcium halide reacts with the hydroxyl groups. Water is added to carry away the resultant hydrogen halide. Gaseous calcium and water are then added to form a calcium oxide gate dielectric, until the desired thickness has been achieved. In an alternative embodiment of the method, the calcium halide is transported to the silicon wafer to react with the hydroxyl groups, followed by transport of gaseous water to the silicon wafer. These two steps are repeated until the desired thickness has been achieved.

Abstract translation: 包含氧化钙的新的相对高k的栅介质栅极材料将减少从硅衬底到多晶硅栅极的泄漏，防止在p沟道器件中的硼渗透，并减少电介质中的电子俘获。 硅晶片的表面被羟基饱和。 将卤化钙，优选溴化钙加热到足以实现原子层沉积的温度，并被输送到硅晶片。 卤化钙与羟基反应。 加入水以携带所得的卤化氢。 然后加入气态钙和水以形成氧化钙栅极电介质，直至达到所需的厚度。 在该方法的替代实施方案中，将卤化钙输送到硅晶片以与羟基反应，然后将气态水输送到硅晶片。 重复这两个步骤，直到达到所需的厚度。

公开(公告)号：US20040054815A1

公开(公告)日：2004-03-18

申请号：US10245148

申请日：2002-09-16

Applicant: LSI LOGIC CORPORATION

Inventor： Robert Neal Carlton Broberg III

IPC: G06F003/00

CPC classification number: G01R31/31705 ,  G01R31/31723 ,  G01R31/318516

Abstract: An apparatus comprising a first circuit, a second circuit, and a third circuit. The first circuit may be configured to receive a plurality of input signals and present one of the plurality of input signals as a data signal in response to a control signal. The second circuit may be configured to generate the control signal and generate a trace data stream in response to the data signal. The third circuit may be configured to receive and store the trace data stream and read and present the stored trace data stream in response to one or more commands.

Abstract translation: 一种包括第一电路，第二电路和第三电路的装置。 第一电路可以被配置为响应于控制信号而接收多个输入信号并将多个输入信号之一呈现为数据信号。 第二电路可以被配置为产生控制信号并响应于数据信号产生跟踪数据流。 第三电路可以被配置为接收和存储跟踪数据流，并响应于一个或多个命令读取和呈现所存储的跟踪数据流。

公开(公告)号：US20040024943A1

公开(公告)日：2004-02-05

申请号：US10209467

申请日：2002-07-30

Applicant: LSI LOGIC CORPORATION

Inventor： Gordon F. Lupien JR. ,  Dimitry Paylovsky ,  David C. Maslyn JR.

IPC: G06F013/14 ,  G06F013/36

CPC classification number: G06F13/404

Abstract: An apparatus comprising a plurality of first circuits and a second circuit. Each of the first circuits may be configured to translate attributes and data between one of a plurality of first predetermined formats and a second predetermined format. The second circuit may be configured to route the attributes and data in the second predetermined format from one of the first circuits to another of the first circuits.

Abstract translation: 一种包括多个第一电路和第二电路的装置。 每个第一电路可以被配置为在多个第一预定格式和第二预定格式中的一个之间转换属性和数据。 第二电路可以被配置为将第二预定格式的属性和数据从第一电路之一路由到第一电路中的另一个。