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    Ultrasound imaging system and method for temperature management
    2.
    发明授权
    Ultrasound imaging system and method for temperature management 有权
    超声成像系统及温度管理方法

    公开(公告)号：US08764662B2

    公开(公告)日：2014-07-01

    申请号：US13537109

    申请日：2012-06-29

    Applicant: Bruno Hans Haider ,  Krishnakumar Sundaresan ,  Boris Constantine Joesaar

    Inventor： Bruno Hans Haider ,  Krishnakumar Sundaresan ,  Boris Constantine Joesaar

    IPC: A61B8/00 ,  A61B8/14 ,  G01K1/00

    CPC classification number: A61B8/58 ,  A61B8/546

    Abstract: A temperature management system and a method of monitoring temperature in an ultrasound imaging system is provided. The system includes an ultrasound probe. The ultrasound probe includes at least one ultrasound transducer and a plurality of application specific integrated circuits. Further, the system includes at least one temperature sensing device disposed on at least one of the plurality of application specific integrated circuits. The temperature sensing devices are disposed in such a way that the sensing devices are in thermal contact with at least one heat producing region of the ultrasound probe.

    Abstract translation: 提供了一种超声成像系统中的温度管理系统和温度监视方法。 该系统包括超声波探头。 超声探头包括至少一个超声换能器和多个专用集成电路。 此外，该系统包括设置在多个专用集成电路中的至少一个的至少一个温度感测装置。 温度感测装置以这样的方式设置，使得感测装置与超声波探头的至少一个发热区域热接触。

    PREDICTIVE ANALOG-TO-DIGITAL CONVERTER AND METHODS THEREOF
    4.
    发明申请
    PREDICTIVE ANALOG-TO-DIGITAL CONVERTER AND METHODS THEREOF 失效
    预测模数转数转换器及其方法

    公开(公告)号：US20110148682A1

    公开(公告)日：2011-06-23

    申请号：US12642780

    申请日：2009-12-19

    Applicant: Kenneth Wayne Rigby ,  Robert Gideon Wodnicki ,  Krishnakumar Sundaresan ,  Naresh Kesavan Rao

    Inventor： Kenneth Wayne Rigby ,  Robert Gideon Wodnicki ,  Krishnakumar Sundaresan ,  Naresh Kesavan Rao

    IPC: H03M1/12

    CPC classification number: H03M1/188 ,  H03M1/183 ,  H03M1/208 ,  H03M1/361 ,  H03M1/68

    Abstract: Predictive Analog-to-Digital Converter system in one embodiment includes a sampling section producing a sampled analog input signal with a first summer section combining the sampled analog input signal and an analog prediction signal to produce an analog prediction error signal. There is at least one error analog-to-digital convertor digitizing the analog prediction error signal, wherein a digital error signal output from the error analog-to-digital convertor is one of a full bitwidth error signal during an over-range condition else a lower bitwidth error signal. A second summer is coupled to the digital error signal output and a digital prediction signal, and generates a full bitwidth digital output signal. A feedback section is coupled to the digital output signal and providing the digital prediction signal and the analog prediction signal.

    Abstract translation: 在一个实施例中，预测模数转换器系统包括产生采样模拟输入信号的采样部分，其中组合采样的模拟输入信号和模拟预测信号的第一加法部分产生模拟预测误差信号。 至少有一个误差模拟数字转换器将模拟预测误差信号数字化，其中从误差模数转换器输出的数字误差信号是在超范围条件期间的完全位宽误差信号之一，否则 较低的位宽错误信号。 第二个夏天耦合到数字误差信号输出和数字预测信号，并产生完整的位宽数字输出信号。 反馈部分耦合到数字输出信号并提供数字预测信号和模拟预测信号。

    ULTRASONIC TRANSDUCER DRIVING CIRUIT AND ULTRASONIC IMAGE DISPLAY APPARATUS
    5.
    发明申请
    ULTRASONIC TRANSDUCER DRIVING CIRUIT AND ULTRASONIC IMAGE DISPLAY APPARATUS 有权
    超声波传感器驱动电路和超声波图像显示装置

    公开(公告)号：US20130104658A1

    公开(公告)日：2013-05-02

    申请号：US13284156

    申请日：2011-10-28

    Applicant: Shinichi Amemiya ,  Bruno Haider ,  Krishnakumar Sundaresan

    Inventor： Shinichi Amemiya ,  Bruno Haider ,  Krishnakumar Sundaresan

    IPC: G01N29/06 ,  H01L41/09

    CPC classification number: H01L41/09 ,  B06B1/0207 ,  B06B1/0215 ,  G01N29/06 ,  G01N29/34 ,  G01N29/44 ,  G01N2291/048 ,  G01N2291/102

    Abstract: An ultrasonic transducer driving circuit configured to supply an output current and/or an output voltage to an output line for driving an ultrasonic transducer is provided. The ultrasonic transducer driving circuit includes a first current discharge circuit configured to allow a current arising from electric charges accumulated in the ultrasonic transducer to flow from the output line to ground when the output line is at a positive voltage, and a second current discharge circuit configured to allow the current arising from the electric charges accumulated in the ultrasonic transducer to flow from ground to the output line when the output line is at a negative voltage. The first current discharge circuit and the second current discharge circuit are controlled based on the output current and/or the output voltage.

    Abstract translation: 提供了一种超声波换能器驱动电路，其被配置为向用于驱动超声换能器的输出线提供输出电流和/或输出电压。 超声波换能器驱动电路包括：第一电流放电电路，被配置为当输出线处于正电压时允许从超声波换能器中累积的电荷产生的电流从输出线流向地，并且第二电流放电电路配置 当输出线处于负电压时，允许从超声波换能器中累积的电荷产生的电流从地流到输出线。 基于输出电流和/或输出电压来控制第一电流放电电路和第二电流放电电路。

    Predictive analog-to-digital converter and methods thereof
    7.
    发明授权
    Predictive analog-to-digital converter and methods thereof 失效
    预测模数转换器及其方法

    公开(公告)号：US08009072B2

    公开(公告)日：2011-08-30

    申请号：US12642780

    申请日：2009-12-19

    Applicant: Kenneth Wayne Rigby ,  Robert Gideon Wodnicki ,  Krishnakumar Sundaresan ,  Naresh Kesavan Rao

    Inventor： Kenneth Wayne Rigby ,  Robert Gideon Wodnicki ,  Krishnakumar Sundaresan ,  Naresh Kesavan Rao

    IPC: H03M3/00 ,  H03M1/12 ,  H03M1/10

    CPC classification number: H03M1/188 ,  H03M1/183 ,  H03M1/208 ,  H03M1/361 ,  H03M1/68

    Abstract: Predictive Analog-to-Digital Converter system in one embodiment includes a sampling section producing a sampled analog input signal with a first summer section combining the sampled analog input signal and an analog prediction signal to produce an analog prediction error signal. There is at least one error analog-to-digital convertor digitizing the analog prediction error signal, wherein a digital error signal output from the error analog-to-digital convertor is one of a full bitwidth error signal during an over-range condition else a lower bitwidth error signal. A second summer is coupled to the digital error signal output and a digital prediction signal, and generates a full bitwidth digital output signal. A feedback section is coupled to the digital output signal and providing the digital prediction signal and the analog prediction signal.

    Abstract translation: 在一个实施例中，预测模数转换器系统包括产生采样模拟输入信号的采样部分，其中组合采样的模拟输入信号和模拟预测信号的第一加法部分产生模拟预测误差信号。 至少有一个误差模拟数字转换器将模拟预测误差信号数字化，其中从误差模数转换器输出的数字误差信号是在超范围条件期间的完全位宽误差信号之一，否则 较低的位宽错误信号。 第二个夏天耦合到数字误差信号输出和数字预测信号，并产生完整的位宽数字输出信号。 反馈部分耦合到数字输出信号并提供数字预测信号和模拟预测信号。

    Highly tunable low-impedance capacitive micromechanical resonators, oscillators, and processes relating thereto
    8.
    发明授权
    Highly tunable low-impedance capacitive micromechanical resonators, oscillators, and processes relating thereto 失效
    高度可调谐的低阻抗电容微机械谐振器，振荡器和与之有关的工艺

    公开(公告)号：US07511870B2

    公开(公告)日：2009-03-31

    申请号：US11251197

    申请日：2005-10-15

    Applicant: Gavin Kar-Fai Ho ,  Farrokh Ayazi ,  Siavash Pourkamali ,  Krishnakumar Sundaresan

    Inventor： Gavin Kar-Fai Ho ,  Farrokh Ayazi ,  Siavash Pourkamali ,  Krishnakumar Sundaresan

    IPC: G02B26/00 ,  H03H9/00 ,  H01L41/00

    CPC classification number: H03B5/30 ,  H03H9/02244 ,  H03H9/02338 ,  H03H9/2463 ,  H03H9/462 ,  H03H9/505 ,  H03H2009/02496

    Abstract: Disclosed are capacitive micromechanical resonators optimized for high Q, low motional impedance, and large tuning range. Exemplary resonators were fabricated using a HARPSS-on-SOI process, and demonstrated quality factors up to 119000 in vacuum. For resonators operating between 3 MHz and 30 MHz, the lowest extracted impedance is 218 kΩ and the largest electrostatic tuning coefficient is −240 ppm/V2. The disclosed designs are applicable up to at least 200 MHz operation. An oscillator interface circuit comprising of a trans-impedance amplifier and an automatic bias generator providing a temperature-compensating bias voltage is also disclosed. Experiments show temperature drift reduction from 2800 ppm to 39 ppm over a 100° C. range. Process compensation (DFM) of micromechanical resonators, resonators having mass loading elements that allow generation of closely spaced frequencies, and coupled systems comprising of the resonators are also described.

    Abstract translation: 公开了针对高Q，低运动阻抗和大调谐范围进行了优化的电容微机械谐振器。 使用HARPSS-on-SOI工艺制造了示例性谐振器，并在真空中显示出高达119000的质量因子。 对于在3 MHz和30 MHz之间工作的谐振器，最低提取阻抗为218 kOmega，最大静电调谐系数为-240 ppm / V2。 所公开的设计可应用于至少200MHz的操作。 还公开了一种包括跨阻放大器和提供温度补偿偏置电压的自动偏置发生器的振荡器接口电路。 实验显示在100°C范围内，温度从2800ppm降至39ppm。 还描述了微机械谐振器的工艺补偿（DFM），具有允许产生紧密间隔的频率的质量负载元件的谐振器以及包括谐振器的耦合系统。

    Ultrasonic transducer driving ciruit and ultrasonic image display apparatus
    9.
    发明授权
    Ultrasonic transducer driving ciruit and ultrasonic image display apparatus 有权
    超声波传感器驱动电路和超声波图像显示装置

    公开(公告)号：US08933613B2

    公开(公告)日：2015-01-13

    申请号：US13284156

    申请日：2011-10-28

    Applicant: Shinichi Amemiya ,  Bruno Haider ,  Krishnakumar Sundaresan

    Inventor： Shinichi Amemiya ,  Bruno Haider ,  Krishnakumar Sundaresan

    IPC: B06B1/02 ,  G01N29/34

    CPC classification number: H01L41/09 ,  B06B1/0207 ,  B06B1/0215 ,  G01N29/06 ,  G01N29/34 ,  G01N29/44 ,  G01N2291/048 ,  G01N2291/102

    Abstract: An ultrasonic transducer driving circuit configured to supply an output current and/or an output voltage to an output line for driving an ultrasonic transducer is provided. The ultrasonic transducer driving circuit includes a first current discharge circuit configured to allow a current arising from electric charges accumulated in the ultrasonic transducer to flow from the output line to ground when the output line is at a positive voltage, and a second current discharge circuit configured to allow the current arising from the electric charges accumulated in the ultrasonic transducer to flow from ground to the output line when the output line is at a negative voltage. The first current discharge circuit and the second current discharge circuit are controlled based on the output current and/or the output voltage.

    Abstract translation: 提供了一种超声波换能器驱动电路，其被配置为向用于驱动超声换能器的输出线提供输出电流和/或输出电压。 超声波换能器驱动电路包括：第一电流放电电路，被配置为当输出线处于正电压时允许从超声波换能器中累积的电荷产生的电流从输出线流向地，并且第二电流放电电路配置 当输出线处于负电压时，允许从超声波换能器中累积的电荷产生的电流从地流到输出线。 基于输出电流和/或输出电压来控制第一电流放电电路和第二电流放电电路。

    METHOD AND APPARATUS FOR PERFORMING VIA ARRAY MERGING AND PARASITIC EXTRACTION
    10.
    发明申请
    METHOD AND APPARATUS FOR PERFORMING VIA ARRAY MERGING AND PARASITIC EXTRACTION 有权
    用于通过阵列合并和PARASITIC提取来执行的方法和装置

    公开(公告)号：US20120317531A1

    公开(公告)日：2012-12-13

    申请号：US13362583

    申请日：2012-01-31

    Applicant: Krishnakumar Sundaresan

    Inventor： Krishnakumar Sundaresan

    IPC: G06F17/50

    CPC classification number: G06F17/5036 ,  G06F17/5068

    Abstract: Systems and techniques for performing parasitic extraction on a via array are described. If the via array is a single row or column via array, the system identifies a first via and a last via in the via array, and merges a set of vias between the first via and the last via into a center via. If the via array is a M×N (M≧2, N≧2) via array, the system merges the vias as follows: the first row and the last row of vias in the via array into a first row via and a last row via, respectively; the first column and the last column of vias in the via array into a first column via and a last column via, respectively; and a set of vias between the first and last rows and the first and last columns into a center via.

    Abstract translation: 描述了在通孔阵列上执行寄生提取的系统和技术。 如果通孔阵列是通过阵列的单行或列，则系统识别通孔阵列中的第一通孔和最后一个通孔，并将第一通孔和最后通孔之间的一组通孔合并到中心通孔中。 如果通孔阵列是通过阵列的M×N（M≥2，N≥2），则系统将通孔合并如下：通孔阵列中的第一行和最后一列通孔进入第一行，最后一行 行通 通孔阵列中的第一列和最后一列通孔分别插入第一列通孔和最后一列通孔; 以及在第一行和最后一行之间的一组通道以及第一列和最后一列进入中心通道。

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