公开(公告)号：US5473456A

公开(公告)日：1995-12-05

申请号：US143806

申请日：1993-10-27

申请人： Robert J. Cava ,  Jueinai R. Kwo ,  Gordon A. Thomas

发明人： Robert J. Cava ,  Jueinai R. Kwo ,  Gordon A. Thomas

IPC分类号： G02F1/1343 ,  H01L31/18 ,  H01L23/48

CPC分类号： G02F1/13439 ,  H01L31/1884 ,  Y02E10/50

摘要： Applicants have discovered that films of conductively doped GaInO.sub.3 grown on substrates by sputter deposition have conductivity comparable to conventional wide band-gap transparent conductors while exhibiting superior light transmission, particularly in the green and blue wavelength regions of the visible spectrum. Substrate temperatures ranged from 100.degree. C. to 550.degree. C. in an argon-oxygen ambient of total pressure 4 mTorr to 20 mTorr with an optimal oxygen partial pressure in the range 0.5 to 2 mTorr.

摘要翻译： 申请人已经发现通过溅射沉积在衬底上生长的导电掺杂的GaInO 3的膜具有与传统的宽带隙透明导体相当的导电性，同时表现出优异的光透射性，特别是在可见光谱的绿色和蓝色波长区域。 基底温度范围为100℃至550℃，在总压力4mTorr至20mTorr的氩 - 氧环境中，最佳氧分压范围为0.5至2mTorr。

公开(公告)号：US5628933A

公开(公告)日：1997-05-13

申请号：US622324

申请日：1996-03-26

申请人： Sue A. Carter ,  Robert J. Cava ,  Jueinai R. Kwo ,  Julia M. Phillips ,  Gordon A. Thomas

发明人： Sue A. Carter ,  Robert J. Cava ,  Jueinai R. Kwo ,  Julia M. Phillips ,  Gordon A. Thomas

IPC分类号： C01G15/00 ,  C01G17/00 ,  C01G19/00 ,  H01B1/08 ,  C01G9/02

CPC分类号： H01B1/08 ,  C01G15/00 ,  C01G15/006 ,  C01G17/006 ,  C01G19/006 ,  Y10S420/903

摘要： Applicant has discovered that aliovalently doped zinc-indium-oxide where In is 40-75% of the metal elements can achieve electrical conductivity comparable to wide band-gap semiconductors presently in use while exhibiting enhanced transparency in both the visible and infrared. The material can be doped to resistivity of less than 1 milliohm-cm by small quantifies of aliovalent dopants, such as tetravalent atoms. It can be deposited on glass substrates in amorphous and polycrystalline films.

摘要翻译： 申请人已经发现，其中In是金属元素的40-75％的异氰酸盐掺杂的锌 - 铟氧化物可以实现与目前使用的宽带隙半导体相当的导电性，同时在可见光和红外线都显示增强的透明度。 该材料可以通过小数量的诸如四价原子的低价掺杂剂掺杂到小于1毫欧姆 - 厘米的电阻率。 它可以沉积在玻璃基板上的非晶和多晶膜中。

公开(公告)号：US5523587A

公开(公告)日：1996-06-04

申请号：US82194

申请日：1993-06-24

申请人： Jueinai R. Kwo

发明人： Jueinai R. Kwo

IPC分类号： C01B33/02 ,  G02F1/1368 ,  H01L21/20 ,  H01L21/203 ,  H01L21/205 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786 ,  H01L29/04 ,  H01L31/036

CPC分类号： H01L21/02422 ,  H01L21/02488 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02631 ,  G02F1/1368 ,  Y10S438/967

摘要： In accordance with the invention, a thin layer of epitaxial silicon is grown at low temperatures at or below 300.degree. C. by the steps of providing a substrate, forming an oriented dielectric buffer layer on the substrate and growing epitaxial silicon on the buffer layer. Preferably the substrate has a glass surface and the oriented buffer layer is cubic ZrO.sub.2. The buffer layer is preferably oriented by bombarding it with a directed ion beam while the buffer layer is being deposited on the substrate. For example, a buffer layer of (100) cubic ZrO.sub.2 can be grown at a temperature as low as 300.degree. C. The oriented cubic ZrO.sub.2 is an excellent buffer for epitaxial silicon on glass due to a good match of lattice parameters with silicon and a good match of thermal expansion coefficients with glass. An oriented (100) silicon epitaxial film can then be grown on the epitaxial template provided by the buffer layer at a temperature as low as 250.degree. C. This low temperature process for producing epitaxial films offers multiple advantages: (1) reduced silicon interfacial defect densities and enlarged grain size permitting improved thin film transistor performance due to a lowered "off" current; (2) higher electron mobility permitting the fabrication of integrated displays; (3) lower temperature processing permitting the use of inexpensive glass substrates such as borosilicates; (4) sufficiently low temperature processing to permit the use of new lightweight substrates such as glass-coated polymeric materials (glass-coated plastics) which can substantially reduce the weight of displays and thus enhance the portability of portable computers, video telephones, and personal communicators; and (5) the use of new buffer layers such as ZrO.sub.2 which can block the diffusion of Na ions from the substrate.

摘要翻译： 根据本发明，通过提供衬底，在衬底上形成取向介质缓冲层并在缓冲层上生长外延硅的步骤，在低于或等于300℃的低温下生长薄层的外延硅。 优选地，基板具有玻璃表面，并且取向缓冲层是立方ZrO 2。 缓冲层优选通过用定向离子束轰击而取代，同时缓冲层被沉积在基底上。 例如，可以在低至300℃的温度下生长（100）立方ZrO 2的缓冲层。由于晶格参数与硅和硅的良好匹配，取向立方ZrO 2是玻璃上外延硅的优异缓冲液 热膨胀系数与玻璃的良好匹配。 然后可以在低至250℃的缓冲层提供的外延模板上生长定向（100）硅外延膜。制造外延膜的这种低温工艺具有多个优点：（1）降低硅界面缺陷 密度和扩大的晶粒尺寸允许由于降低的“截止”电流而改善薄膜晶体管性能; （2）更高的电子迁移率允许制造集成显示器; （3）低温处理允许使用便宜的玻璃基板如硼硅酸盐; （4）足够低的温度处理以允许使用新的轻质基底，例如玻璃涂覆的聚合物材料（玻璃涂覆的塑料），其可以显着降低显示器的重量，从而增强便携式计算机，视频电话和个人的便携性 沟通者 和（5）使用可以阻挡Na离子从衬底扩散的新的缓冲层如ZrO 2。