公开(公告)号：US08475644B2

公开(公告)日：2013-07-02

申请号：US12606030

申请日：2009-10-26

申请人： Steven Mayer ,  Jingbin Feng ,  Zhian He ,  Jonathan Reid ,  Seshasayee Varadarajan

发明人： Steven Mayer ,  Jingbin Feng ,  Zhian He ,  Jonathan Reid ,  Seshasayee Varadarajan

IPC分类号： C25D21/12 ,  C25D7/12 ,  C25D3/38

CPC分类号： C25D17/12 ,  C23C18/1601 ,  C25D5/02 ,  C25D17/001 ,  C25D17/002 ,  C25D17/007 ,  C25D17/008 ,  C25D21/12 ,  C25D21/14 ,  C25F3/30 ,  H01L21/2885 ,  H01L21/32115 ,  H01L21/32125 ,  H01L21/6715 ,  H01L21/76873

摘要： An apparatus for electroplating a layer of metal onto the surface of a wafer includes an ionically resistive ionically permeable element located in close proximity of the wafer and an auxiliary cathode located between the anode and the ionically resistive ionically permeable element. The ionically resistive ionically permeable element serves to modulate ionic current at the wafer surface. The auxiliary cathode is configured to shape the current distribution from the anode. The provided configuration effectively redistributes ionic current in the plating system allowing plating of uniform metal layers and mitigating the terminal effect.

公开(公告)号：US20120279864A1

公开(公告)日：2012-11-08

申请号：US13286103

申请日：2011-10-31

申请人： Steven T. Mayer ,  Vijay Bhaskaran ,  Evan E. Patton ,  Robert L. Jackson ,  Jonathan Reid

发明人： Steven T. Mayer ,  Vijay Bhaskaran ,  Evan E. Patton ,  Robert L. Jackson ,  Jonathan Reid

IPC分类号： C25D5/18 ,  C25B15/02

CPC分类号： C25D3/02 ,  C25D3/38 ,  C25D5/022 ,  C25D5/18 ,  H01L21/2885 ,  H01L21/76877 ,  H05K3/423

摘要： Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.

摘要翻译： 描述了几种用于减少或减轻在电镀微观凹陷特征的内部区域中的接缝和/或空隙的形成的技术。 阴极极化用于减轻将电镀有种子层的基板引入电镀溶液中的有害影响。 还描述了扩散控制的电镀技术，以提供沟槽和通孔的自下而上的填充，从而避免由此侧壁一起生长以产生接缝/空隙。 还描述了初步电镀步骤，在特征的内表面上镀覆导电薄膜，导致特征底部具有足够的导电性，便于自底向上填充。

公开(公告)号：US20110221044A1

公开(公告)日：2011-09-15

申请号：US12723532

申请日：2010-03-12

申请人： Michal Danek ,  Tom Mountsier ,  Jonathan Reid ,  Juwen Gao ,  Aaron Fellis

发明人： Michal Danek ,  Tom Mountsier ,  Jonathan Reid ,  Juwen Gao ,  Aaron Fellis

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76898 ,  H01L21/2885 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76876 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： Apparatus and methods for filling through silicon vias (TSV's) with copper having an intervening tungsten layer between the copper plug and the silicon are disclosed. Methods are useful for Damascene processing, with or without a TSV feature. The tungsten layer serves as a diffusion barrier, a seed layer for copper electrofill and a means of reducing CTE-induced stresses between copper and silicon. Adhesion of the tungsten layer to the silicon and of the copper layer to the tungsten is described.

摘要翻译： 公开了用于在铜插塞和硅之间具有插入钨层的铜填充硅通孔（TSV）的装置和方法。 方法对于具有或不具有TSV特征的镶嵌处理是有用的。 钨层用作扩散阻挡层，用于铜电解填料的种子层和减少铜和硅之间CTE引起的应力的手段。 描述了钨层对硅和铜层与钨的粘附。

公开(公告)号：US07799684B1

公开(公告)日：2010-09-21

申请号：US11682175

申请日：2007-03-05

申请人： Jonathan Reid ,  Seyang Park ,  Seshasayee Varadarajan ,  Natalia Doubina

发明人： Jonathan Reid ,  Seyang Park ,  Seshasayee Varadarajan ,  Natalia Doubina

IPC分类号： H01L21/44

CPC分类号： H01L21/76873 ,  C25D3/38 ,  C25D5/02 ,  C25D5/10 ,  C25D5/18 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/76864 ,  H01L21/76877

摘要： A two-step semiconductor electroplating process deposits copper onto wafers coated with a semi-noble metal in manner that is uniform across the wafer and free of voids. A plating bath nucleates copper uniformly and conformably at a high density in a very thin film. A second bath fills the features. A unique pulsed waveform enhances the nucleation density and reduces resistivity of the very thin film deposited in the nucleation operation. The process produces a thinner and conformal copper seed film than traditional PVD copper seed processes.

摘要翻译： 两步半导体电镀工艺将铜沉积在半贵金属涂层的晶片上，在晶片上均匀且无空隙。 电镀槽在非常薄的膜中以高密度均匀且顺应地使铜成核。 第二个浴缸充满了功能。 独特的脉冲波形增强了成核密度并降低了在成核操作中沉积的非常薄的薄膜的电阻率。 该方法产生比传统的PVD铜种子工艺更薄和保形的铜籽膜。

公开(公告)号：US06844335B2

公开(公告)日：2005-01-18

申请号：US10221598

申请日：2001-03-22

申请人： Antonio Almario Garcia ,  Ryoichi Ando ,  Keiichi Arimoto ,  Fumiaki Uehara ,  Adrien Tak Li ,  Aya Shoda ,  Jonathan Reid Frost ,  Kazutoshi Watanabe

发明人： Antonio Almario Garcia ,  Ryoichi Ando ,  Keiichi Arimoto ,  Fumiaki Uehara ,  Adrien Tak Li ,  Aya Shoda ,  Jonathan Reid Frost ,  Kazutoshi Watanabe

IPC分类号： A61K31/505 ,  A61K31/506 ,  A61P3/04 ,  A61P3/10 ,  A61P5/00 ,  A61P9/00 ,  A61P11/00 ,  A61P15/00 ,  A61P17/02 ,  A61P17/14 ,  A61P19/00 ,  A61P25/00 ,  A61P25/02 ,  A61P25/18 ,  A61P25/24 ,  A61P25/26 ,  A61P25/28 ,  A61P27/02 ,  A61P27/06 ,  A61P31/12 ,  A61P35/00 ,  A61P35/02 ,  A61P43/00 ,  C07D401/04 ,  C07D401/14 ,  C07D409/14

CPC分类号： A61K31/505 ,  C07D401/04 ,  C07D401/14 ,  C07D409/14

摘要： A pyrimidone derivative represented by formula (I) or a salt thereof: Wherein: R1 represents a hydrogen atom or a C1-6 alkyl group which may be substituted by a C6,10 aryl group; R2 represents a C1-10 alkyl group which may be substituted, a C2-6 alkenyl group which may be substituted, a C3-6 alkynyl group which may be substituted, a C3-6 cycloalkyl group which may be substituted, or a C6-10 ARYL group which may be substituted; or R1 and R2 form together a C2-6 alkylene group which may be substituted; or R1 and R2 form together a chain of formula —(CH2)2—X—(CH2)2— or —(CH2)2—X—(CH2)3— where X represents a oxygen atom, a sulfur atom, or a nitrogen atom which may be substituted; R3 represents a 2, 3 or 4-pyridyl group optionally substituted by a C1-4 alkyl group, C1-4 alkoxy group or halogen atom; and R4 represents a C1-10 alkyl group optionally substituted by a hydroxyl group, amino, C1-6 monoalkylamino group, C2-12 dialkylamino group or C6,10 aryl group which may be substituted. And a medicament comprising the said derivative or a salt thereof as an active ingredient which is used for preventive and/or therapeutic treatment of a neurodegenerative disease caused by abnormal activity of GSK3β such as Alzheimer's disease.

摘要翻译： 由式（I）表示的嘧啶酮衍生物或其盐：其中：R1表示氢原子或可被C6,10芳基取代的C1-6烷基; R2表示可以被C 1-6烷基取代的C 1-10烷基， 可被取代的C2-6烯基，可被取代的C3-6炔基，可被取代的C3-6环烷基或可被取代的C6-10ArYL基;或R1 并且R 2一起形成可被取代的C 2-6亚烷基;或者R 1和R 2一起形成式 - （CH 2）2 -X-（CH 2）2 - 或 - （CH 2）2 -X-（CH 2） 3-其中X表示氧原子，硫原子或可被取代的氮原子; R 3表示任选被C 1-4烷基，C 1-4烷氧基或卤素取代的2,3或4-吡啶基 原子; R 4表示可以被羟基任选取代的C 1-10烷基，可以被取代的氨基，C 1-6单烷基氨基，C 2-12二烷基氨基或C 6〜10芳基。并且包含所述衍生物或其盐 作为用于预防和/或治疗由GSK3β如阿尔茨海默病异常活动引起的神经变性疾病的活性成分。

公开(公告)号：US06551483B1

公开(公告)日：2003-04-22

申请号：US09853959

申请日：2001-05-10

申请人： Steven T. Mayer ,  Jonathan Reid ,  Robert Contolini

发明人： Steven T. Mayer ,  Jonathan Reid ,  Robert Contolini

IPC分类号： C25D2112

CPC分类号： H01L21/2885 ,  C25D5/18 ,  C25D7/123

摘要： Controlled-potential electroplating provides an effective method of electroplating metals onto the surfaces of high aspect ratio recessed features of integrated circuit devices. Methods are provided to mitigate corrosion of a metal seed layer on recessed features due to contact of the seed layer with an electrolyte solution. The potential can also be controlled to provide conformal plating over the seed layer and bottom-up filling of the recessed features. For each of these processes, a constant cathodic voltage, pulsed cathodic voltage, or ramped cathodic voltage can be used. An apparatus for controlled-potential electroplating includes a reference electrode placed near the surface to be plated and at least one cathode sense lead to measure the potential at points on the circumference of the integrated circuit structure.

摘要翻译： 控制电位电镀提供了将金属电镀到集成电路器件的高纵横比凹陷特征的表面上的有效方法。 提供了一种方法，用于减轻由于种子层与电解质溶液的接触而导致的凹陷特征上的金属种子层的腐蚀。 还可以控制电位以在种子层上提供适形电镀，并且自下而上地填充凹陷特征。 对于这些处理中的每一个，可以使用恒定的阴极电压，脉冲阴极电压或斜坡阴极电压。 用于控制电位电镀的装置包括放置在待镀表面附近的参考电极和至少一个阴极检测引线，以测量集成电路结构的圆周上的点处的电位。

公开(公告)号：US09045841B1

公开(公告)日：2015-06-02

申请号：US13359343

申请日：2012-01-26

申请人： Bryan Buckalew ,  Jonathan Reid ,  John Sukamto ,  Zhian He ,  Seshasayee Varadarajan ,  Steven T. Mayer

发明人： Bryan Buckalew ,  Jonathan Reid ,  John Sukamto ,  Zhian He ,  Seshasayee Varadarajan ,  Steven T. Mayer

IPC分类号： C25D3/02 ,  C25D21/14

CPC分类号： C25D21/14 ,  C25D17/001 ,  C25D17/002

摘要： In a copper electroplating apparatus having separate anolyte and catholyte portions, the concentration of anolyte components (e.g., acid or copper salt) is controlled by providing a diluent to the recirculating anolyte. The dosing of the diluent can be controlled by the user and can follow a pre-determined schedule. For example, the schedule may specify the diluent dosing parameters, so as to prevent precipitation of copper salt in the anolyte. Thus, precipitation-induced anode passivation can be minimized.

摘要翻译： 在具有单独阳极电解液和阴极电解液部分的铜电镀设备中，通过向循环阳极电解液提供稀释剂来控制阳极电解液组分（例如酸或铜盐）的浓度。 稀释剂的剂量可以由用户控制，并且可以遵循预定的时间表。 例如，时间表可以指定稀释剂配量参数，以防止铜盐在阳极电解液中沉淀。 因此，沉淀诱导的阳极钝化可以最小化。

公开(公告)号：US08168540B1

公开(公告)日：2012-05-01

申请号：US12649237

申请日：2009-12-29

申请人： Jonathan Reid ,  Sesha Varadarajan ,  Ugur Emekli

发明人： Jonathan Reid ,  Sesha Varadarajan ,  Ugur Emekli

IPC分类号： H01L21/44

CPC分类号： H01L21/76898 ,  C25D3/38 ,  C25D5/10 ,  C25D5/50 ,  H01L21/2885 ,  H01L21/76861 ,  H01L21/76873

摘要： Apparatus and methods for depositing copper on tungsten are presented. The invention finds particular use in the semiconductor industry for depositing copper seed layers onto fields or through silicon vias having tungsten barrier layers, both reducing cost and complexity of existing methods.

摘要翻译： 介绍了在钨上沉积铜的装置和方法。 本发明在半导体工业中特别用于将铜籽晶层沉积到场上或通过具有钨阻挡层的硅通孔，既降低了现有方法的成本和复杂性。

公开(公告)号：US20100044236A1

公开(公告)日：2010-02-25

申请号：US12606030

申请日：2009-10-26

申请人： Steven Mayer ,  Jingbin Feng ,  Zhian He ,  Jonathan Reid ,  Seshasayee Varadarajan

发明人： Steven Mayer ,  Jingbin Feng ,  Zhian He ,  Jonathan Reid ,  Seshasayee Varadarajan

IPC分类号： C25D5/00 ,  C25D17/00 ,  C25D21/12

CPC分类号： C25D17/12 ,  C23C18/1601 ,  C25D5/02 ,  C25D17/001 ,  C25D17/002 ,  C25D17/007 ,  C25D17/008 ,  C25D21/12 ,  C25D21/14 ,  C25F3/30 ,  H01L21/2885 ,  H01L21/32115 ,  H01L21/32125 ,  H01L21/6715 ,  H01L21/76873

摘要： An apparatus for electroplating a layer of metal onto the surface of a wafer includes an ionically resistive ionically permeable element located in close proximity of the wafer and an auxiliary cathode located between the anode and the ionically resistive ionically permeable element. The ionically resistive ionically permeable element serves to modulate ionic current at the wafer surface. The auxiliary cathode is configured to shape the current distribution from the anode. The provided configuration effectively redistributes ionic current in the plating system allowing plating of uniform metal layers and mitigating the terminal effect.

摘要翻译： 用于将金属层电镀到晶片表面上的装置包括位于晶片附近的离子电离离子可渗透元件和位于阳极和离子电离性可离子渗透元件之间的辅助阴极。 离子电阻性离子渗透元件用于调节晶片表面处的离子电流。 辅助阴极被配置成使来自阳极的电流分布成形。 所提供的配置有效地重新分布电镀系统中的离子电流，允许电镀均匀的金属层并减轻终端效应。

公开(公告)号：US20100032310A1

公开(公告)日：2010-02-11

申请号：US12291356

申请日：2008-11-07

申请人： Jonathan Reid ,  Bryan Buckalew ,  Zhian He ,  Seyang Park ,  Seshasayee Varadarajan ,  Bryan Pennington ,  Thomas Ponnuswamy ,  Patrick Breiling ,  Glenn Ibarreta ,  Steven Mayer

发明人： Jonathan Reid ,  Bryan Buckalew ,  Zhian He ,  Seyang Park ,  Seshasayee Varadarajan ,  Bryan Pennington ,  Thomas Ponnuswamy ,  Patrick Breiling ,  Glenn Ibarreta ,  Steven Mayer

IPC分类号： C25D3/00 ,  C25D17/00

CPC分类号： C25D17/008 ,  C25D7/123 ,  C25D17/001 ,  C25D17/007 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76873

摘要： An apparatus for electroplating a layer of metal on the surface of a wafer includes an ionically resistive ionically permeable element located in close proximity of the wafer (preferably within 5 mm of the wafer surface) which serves to modulate ionic current at the wafer surface, and a second cathode configured to divert a portion of current from the wafer surface. The ionically resistive ionically permeable element in a preferred embodiment is a disk made of a resistive material having a plurality of perforations formed therein, such that perforations do not form communicating channels within the body of the disk. The provided configuration effectively redistributes ionic current in the plating system allowing plating of uniform metal layers and mitigating the terminal effect.

摘要翻译： 用于在晶片表面上电镀一层金属的装置包括位于晶片附近（优选地在晶片表面的5mm内）的离子电离性离子渗透元件，其用于调节晶片表面处的离子电流，以及 第二阴极，被配置为使来自晶片表面的一部分电流转向。 在优选实施例中的离子电阻性离子渗透元件是由电阻材料制成的盘，其中形成有多个穿孔，使得穿孔在盘的主体内不形成连通通道。 所提供的配置有效地重新分布电镀系统中的离子电流，允许电镀均匀的金属层并减轻终端效应。