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公开(公告)号：US08589215B2
公开(公告)日：2013-11-19
申请号：US13182963
申请日：2011-07-14
Applicant: Simon Anthony Wright , Daniel Aucott , Gerard James Cafolla , Edward Winston Talbot , James George Horne Pratt , Paul James Hadley
Inventor： Simon Anthony Wright , Daniel Aucott , Gerard James Cafolla , Edward Winston Talbot , James George Horne Pratt , Paul James Hadley
IPC: G06Q10/00
CPC classification number: G06Q10/063112 , G06Q10/06311 , G06Q10/06398 , H04M3/5233 , H04M2203/402
Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for analyzing work skills. In one aspect, a method includes receiving work task data specifying a plurality of work tasks for a plurality of service providers. For each service provider, receiving performance data specifying an objective measure of a performance metric associated with the service provider performing a work task; receiving assessment data specifying a subjective measure of an attribute associated with the service provider performing the work task; and generating skills data for the service provider based on an aggregation of the assessment data and the performance data. For each of a plurality of customers receiving customer data specifying work tasks requested by the customer; generating mapping data specifying measures of correlation between the skills data for the service providers and the customer data specifying work tasks requested by the customer; and providing the mapping data to an information provider.
Abstract translation: 方法，系统和装置，包括在计算机存储介质上编码的计算机程序，用于分析工作技能。 一方面，一种方法包括接收指定多个服务提供商的多个工作任务的工作任务数据。 对于每个服务提供商，接收指定与执行工作任务的服务提供商相关联的性能度量的客观度量的性能数据; 接收指定与执行所述工作任务的所述服务提供商相关联的属性的主观度量的评估数据; 以及基于评估数据和性能数据的聚合来为服务提供商生成技能数据。 对于接收客户数据的多个客户中的每一个，指定顾客请求的工作任务; 生成映射数据，其指定服务提供者的技能数据与指定客户请求的工作任务的客户数据之间的相关性的度量; 并将映射数据提供给信息提供者。
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2.发明授权Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor 有权在处理器流水线中提供线程公平性，以响应于处理器流水线中的停顿而使用失速循环计数器公开(公告)号：US08521993B2
公开(公告)日：2013-08-27
申请号：US11784864
申请日：2007-04-09
Applicant: Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
Inventor： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
IPC: G06F9/40
CPC classification number: G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
Abstract: A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
Abstract translation: 这里描述用于在多处理元件环境中提供公平性的方法和装置。 掩模元件被用于具有每个处理元件的保留站的相关部分，同时仍然允许对保留站条目的另一部分的公共访问。 此外，偏置逻辑偏离了管线中的处理元件的选择，远离与阻塞档位相关联的处理元件，以提供管道的公平利用。
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公开(公告)号：US20130018686A1
公开(公告)日：2013-01-17
申请号：US13182963
申请日：2011-07-14
Applicant: Simon Anthony Wright , Daniel Aucott , Gerard James Cafolla , Edward Winston Talbot , James George Horne Pratt , Paul James Hadley
Inventor： Simon Anthony Wright , Daniel Aucott , Gerard James Cafolla , Edward Winston Talbot , James George Horne Pratt , Paul James Hadley
IPC: G06Q10/00
CPC classification number: G06Q10/063112 , G06Q10/06311 , G06Q10/06398 , H04M3/5233 , H04M2203/402
Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for analyzing work skills. In one aspect, a method includes receiving work task data specifying a plurality of work tasks for a plurality of service providers. For each service provider, receiving performance data specifying an objective measure of a performance metric associated with the service provider performing a work task; receiving assessment data specifying a subjective measure of an attribute associated with the service provider performing the work task; and generating skills data for the service provider based on an aggregation of the assessment data and the performance data. For each of a plurality of customers receiving customer data specifying work tasks requested by the customer; generating mapping data specifying measures of correlation between the skills data for the service providers and the customer data specifying work tasks requested by the customer; and providing the mapping data to an information provider.
Abstract translation: 方法，系统和装置，包括在计算机存储介质上编码的计算机程序，用于分析工作技能。 一方面，一种方法包括接收指定多个服务提供商的多个工作任务的工作任务数据。 对于每个服务提供商，接收指定与执行工作任务的服务提供商相关联的性能度量的客观度量的性能数据; 接收指定与执行所述工作任务的所述服务提供商相关联的属性的主观度量的评估数据; 以及基于评估数据和性能数据的聚合来为服务提供商生成技能数据。 对于接收客户数据的多个客户中的每一个，指定顾客请求的工作任务; 生成映射数据，其指定服务提供者的技能数据与指定客户请求的工作任务的客户数据之间的相关性的度量; 并将映射数据提供给信息提供者。
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公开(公告)号：US20110055524A1
公开(公告)日：2011-03-03
申请号：US12941637
申请日：2010-11-08
Applicant: Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
Inventor： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
IPC: G06F9/30
CPC classification number: G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
Abstract: A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
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公开(公告)号：US20070043934A1
公开(公告)日：2007-02-22
申请号：US11208924
申请日：2005-08-22
Applicant: Avinash Sodani , James Hadley
Inventor： Avinash Sodani , James Hadley
IPC: G06F9/44
CPC classification number: G06F9/3863 , G06F9/384
Abstract: Methods and apparatus to provide misprediction recovery through periodic checkpoint are described. In one embodiment, a renamer unit (e.g., within a processor core) recovers a register alias table (RAT) to a state immediately preceding a misprediction.
Abstract translation: 描述了通过定期检查点提供错误预测恢复的方法和装置。 在一个实施例中，重命名单元（例如，处理器核心内）将寄存器别名表（RAT）恢复到紧随错误预测之前的状态。
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Patent Agency Ranking
6.发明授权Copy-on-write buffer for restoring program code from a speculative region to a non-speculative region 有权写时复制缓冲区，用于将程序代码从推测区域恢复到非投机区域公开(公告)号：US09182986B2
公开(公告)日：2015-11-10
申请号：US13730977
申请日：2012-12-29
Applicant: Ravi Rajwar , David Lim , James Hadley , Matthew Merten , Joseph McMahon , Yury Ilin , Justin Deinlein
Inventor： Ravi Rajwar , David Lim , James Hadley , Matthew Merten , Joseph McMahon , Yury Ilin , Justin Deinlein
CPC classification number: G06F9/30145 , G06F9/384 , G06F9/3842 , G06F9/3857 , G06F9/3863
Abstract: An apparatus is described having an out-of-order instruction execution pipeline. The out-of-order execution pipeline has a first circuit and a second circuit. The first circuit is to hold a pointer to physical storage space where information is kept that cannot yet be confirmed as being free of potential dependencies on the information. The second circuit is to hold the pointer if the pointer existed in the first circuit when a non speculative region of program code ended and upon retirement of a following speculative overwriter instruction originally coded to overwrite the information.
Abstract translation: 描述了具有无序指令执行流水线的装置。 无序执行管线具有第一电路和第二电路。 第一个电路是保存指向物理存储空间的指针，其中保存信息，这些信息不能被确认为没有对信息的潜在依赖性。 如果程序代码的非推测区域结束，并且在最初被编码以覆盖该信息的下一个推测性覆盖程序指令退出之后，第二电路将保持该指针存在于第一电路中。
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7.发明申请Copy-On-Write Buffer For Restoring Program Code From A Speculative Region To A Non-Speculative Region 有权复制写缓冲区，用于将程序代码从推测区域恢复到非投机区域公开(公告)号：US20140189315A1
公开(公告)日：2014-07-03
申请号：US13730977
申请日：2012-12-29
Applicant: Ravi RAJWAR , David LIM , James HADLEY , Matthew MERTEN , Joseph MCMAHON , Yury ILIN , Justin DEINLEIN
Inventor： Ravi RAJWAR , David LIM , James HADLEY , Matthew MERTEN , Joseph MCMAHON , Yury ILIN , Justin DEINLEIN
IPC: G06F9/30
CPC classification number: G06F9/30145 , G06F9/384 , G06F9/3842 , G06F9/3857 , G06F9/3863
Abstract: An apparatus is described having an out-of-order instruction execution pipeline. The out-of-order execution pipeline has a first circuit and a second circuit. The first circuit is to hold a pointer to physical storage space where information is kept that cannot yet be confirmed as being free of potential dependencies on the information. The second circuit is to hold the pointer if the pointer existed in the first circuit when a non speculative region of program code ended and upon retirement of a following speculative overwriter instruction originally coded to overwrite the information.
Abstract translation: 描述了具有无序指令执行流水线的装置。 无序执行管线具有第一电路和第二电路。 第一个电路是保存指向物理存储空间的指针，其中保存信息，这些信息不能被确认为没有对信息的潜在依赖性。 如果程序代码的非推测区域结束，并且在最初被编码以覆盖该信息的下一个推测性覆盖程序指令退出之后，第二电路将保持该指针存在于第一电路中。
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8.发明授权Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor 有权通过在超线程微处理器中使用失速循环计数器，将选择偏离延迟线程来提供线程公平性公开(公告)号：US08438369B2
公开(公告)日：2013-05-07
申请号：US12941615
申请日：2010-11-08
Applicant: Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
Inventor： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
IPC: G06F9/40
CPC classification number: G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
Abstract: A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
Abstract translation: 这里描述用于在多处理元件环境中提供公平性的方法和装置。 掩模元件被用于具有每个处理元件的保留站的相关部分，同时仍然允许对保留站条目的另一部分的公共访问。 此外，偏置逻辑偏离了管线中的处理元件的选择，远离与阻塞档位相关联的处理元件，以提供管道的公平利用。
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公开(公告)号：US08402253B2
公开(公告)日：2013-03-19
申请号：US11540307
申请日：2006-09-29
Applicant: Matthew Merten , Avinash Sodani , James Hadley , Alexandre Farcy , Iredamola Olopade
Inventor： Matthew Merten , Avinash Sodani , James Hadley , Alexandre Farcy , Iredamola Olopade
CPC classification number: G06F9/3851
Abstract: In one embodiment, the present invention includes a method for determining if an instruction of a first thread dispatched from a first queue associated with the first thread is stalled in a pipestage of a pipeline, and if so, dispatching an instruction of a second thread from a second queue associated with the second thread to the pipeline if the second thread is not stalled. Other embodiments are described and claimed.
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公开(公告)号：US20080250233A1
公开(公告)日：2008-10-09
申请号：US11784864
申请日：2007-04-09
Applicant: Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
Inventor： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
IPC: G06F9/30
CPC classification number: G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
Abstract: A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
Abstract translation: 这里描述用于在多处理元件环境中提供公平性的方法和装置。 掩模元件被用于具有每个处理元件的保留站的相关部分，同时仍然允许对保留站条目的另一部分的公共访问。 此外，偏置逻辑偏离了管线中的处理元件的选择，远离与阻塞档位相关联的处理元件，以提供管道的公平利用。
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