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公开(公告)号：US5978688A
公开(公告)日：1999-11-02
申请号：US726268
申请日：1996-10-04
CPC分类号： H04M1/733
摘要： A telephone for digital cordless telecommunications includes a frame formatter for logical channel formatting of transmitted baseband signals and received baseband signals. The telephone comprises a radio interface connection with the frame formatter, a FIFO/codec interface conductively coupled to the frame formatter, an interrupt interface conductively coupled to the frame formatter, a data control logic interface conductively coupled to the frame formatter, and a microcontroller interface conductively coupled to the frame formatter.
摘要翻译： 用于数字无绳电信的电话包括用于逻辑信道格式化发送的基带信号和接收的基带信号的帧格式化器。 电话包括与帧格式化器的无线电接口连接，导电耦合到帧格式化器的FIFO /编解码器接口，导电耦合到帧格式化器的中断接口，导电耦合到帧格式化器的数据控制逻辑接口和微控制器接口 导电地耦合到帧格式化器。
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公开(公告)号：US5596724A
公开(公告)日：1997-01-21
申请号：US191948
申请日：1994-02-04
CPC分类号： H03M9/00
摘要： The present invention disclosed an input/output data port circuit which connects a parallel data bus with an input serial data bus and an output serial data bus. The input/output data port is selectively operable in either a linear mode or a buffered mode. The input/output port is comprised of an interface register that is connected to a parallel data bus, a serial input bus and a serial output bus; a temporary register that is serially connected to the interface register, an outbound register that is connected in parallel to the temporary register and serially connected to a serial bus; and an inbound register that is connected in parallel to the temporary register and serially connected to a serial, bus.
摘要翻译： 本发明公开了一种将并行数据总线与输入串行数据总线和输出串行数据总线连接的输入/输出数据端口电路。 输入/输出数据端口可选择性地以线性模式或缓冲模式工作。 输入/输出端口包括连接到并行数据总线，串行输入总线和串行输出总线的接口寄存器; 串行连接到接口寄存器的临时寄存器，与临时寄存器并联并串行连接到串行总线的出站寄存器; 以及与临时寄存器并行连接并串行连接到串行总线的入站寄存器。
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3.发明授权Narrowband digital cordless telephone with a logic high weak driver and a logic low strong driver for keypad interface 失效窄带数字无绳电话，具有逻辑高弱驱动器和逻辑低强度驱动器，用于键盘接口公开(公告)号：US06298107B1
公开(公告)日：2001-10-02
申请号：US08581266
申请日：1995-12-29
申请人： Jacqueline Mullins
发明人： Jacqueline Mullins
IPC分类号： H03K1794
CPC分类号： H03M11/02
摘要： A digital cordless telecommunications unit that serves for communications when paired with a similar unit and connected with a network is disclosed. The unit receives and transmits analog voice signals and also transmits digital baseband signals and receives digital formatted baseband signals. The unit includes a baseband chip, as well as an audio functions block and a system control functions block. The audio functions block comprises an audio front end for receiving and transmitting the analog voice signals and an adaptive differential pulse code modulator codec, connected to the audio front end. The codec converts the analog voice signals to the digital baseband signals and converts the digital formatted baseband signals to the analog voice signals for transmission. The system control functions block comprises a microcontroller connected to the codec for controlling the baseband chip, a memory accessible by the microcontroller for storing control instructions, an interrupt controller connected to the microcontroller, a parallel port connected to the interrupt controller, a wake-up timer connected to the interrupt controller, a clock generator connected to the microcontroller, and a synchronous serial port connected to the interrupt controller.
摘要翻译： 公开了一种数字无绳电信单元，用于在与类似单元配对并与网络连接时用于通信。 该单元接收并发送模拟语音信号，并且还发送数字基带信号并接收数字格式的基带信号。 该单元包括基带芯片，以及音频功能块和系统控制功能块。 音频功能块包括用于接收和发送模拟语音信号的音频前端和连接到音频前端的自适应差分脉冲编码调制器编解码器。 编解码器将模拟语音信号转换为数字基带信号，并将数字格式的基带信号转换为模拟语音信号进行传输。 系统控制功能块包括连接到编解码器的微控制器，用于控制基带芯片，由微控制器访问的用于存储控制指令的存储器，连接到微控制器的中断控制器，连接到中断控制器的并行端口，唤醒 定时器连接到中断控制器，连接到微控制器的时钟发生器和连接到中断控制器的同步串行端口。
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公开(公告)号：US6125139A
公开(公告)日：2000-09-26
申请号：US760883
申请日：1996-12-06
CPC分类号： H04M1/725 , G06F2213/0038 , H04M1/60
摘要： A digital cordless telecommunications unit that serves for communications when paired with a similar unit and connected with a network is disclosed. The unit receives analog receive voice signals and transmits analog transmit voice signals. In addition, the unit transmits digital baseband transmit signals and receives digital formatted baseband receive signals. The unit includes a baseband chip, as well as an audio functions circuit and a system control functions circuit. The audio functions circuit comprises an audio front end for receiving the analog receive voice signals and transmitting the analog transmit voice signals, and an adaptive differential pulse code modulator codec, connected to the audio front end, for converting the analog receive voice signals to the digital transmit signals and converting the digital formatted baseband receive signals to the analog transmit voice signals. The system control functions circuit comprises a microcontroller, connected to the codec, for controlling the baseband chip, a memory accessible by the microcontroller for storing control instructions, an interrupt controller connected to the microcontroller, a parallel port connected to the interrupt controller, a wake-up timer connected to the interrupt controller, a clock generator connected to the microcontroller, and a synchronous serial port connected to the interrupt controller.
摘要翻译： 公开了一种数字无绳电信单元，用于在与类似单元配对并与网络连接时用于通信。 该单元接收模拟接收语音信号并传输模拟传输语音信号。 此外，该单元发射数字基带发射信号并接收数字格式的基带接收信号。 该单元包括基带芯片，以及音频功能电路和系统控制功能电路。 音频功能电路包括用于接收模拟接收语音信号并发送模拟发送语音信号的音频前端，以及连接到音频前端的自适应差分脉冲编码调制器编解码器，用于将模拟接收语音信号转换成数字 发送信号并将数字格式的基带接收信号转换成模拟发送语音信号。 系统控制功能电路包括连接到编解码器的微控制器，用于控制基带芯片，由微控制器访问的用于存储控制指令的存储器，连接到微控制器的中断控制器，连接到中断控制器的并行端口，唤醒 - 连接到中断控制器的定时器，连接到微控制器的时钟发生器和连接到中断控制器的同步串行端口。
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公开(公告)号：US5946353A
公开(公告)日：1999-08-31
申请号：US909383
申请日：1997-08-11
CPC分类号： H04M1/725
摘要： Disclosed is a system for selectively enabling intermediate data processing of digital signals external to an integrated circuit (IC). The system comprises a transcoder, a codec connected to the transcoder, and a data processor located externally to the IC. In response to a strobe signal, a programmable switch diverts digital signals between the transcoder and the codec to a data path from the IC to the external processor. The digital signals are formatted within the IC for processing by the external processor. The externally processed digital signals are returned to the IC via a data path from the external processor. The digital signals are then reformatted within the IC for further processing by the IC.
摘要翻译： 公开了一种用于选择性地实现集成电路（IC）外部的数字信号的中间数据处理的系统。 该系统包括代码转换器，连接到代码转换器的编解码器和位于IC外部的数据处理器。 响应于选通信号，可编程开关将代码转换器和编解码器之间的数字信号转移到从IC到外部处理器的数据路径。 数字信号在IC内格式化，由外部处理器进行处理。 经外部处理的数字信号通过外部处理器的数据路径返回到IC。 数字信号然后在IC内重新格式化，以便IC进一步处理。
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公开(公告)号：US5657351A
公开(公告)日：1997-08-12
申请号：US668600
申请日：1996-06-19
CPC分类号： H04M1/725
摘要： Disclosed is a system for selectively enabling intermediate data processing of digital signals external to an integrated circuit (IC). The system comprises a transcoder, a codec connected to the transcoder, and a data processor located externally to the IC. In response to a strobe signal, a programmable switch diverts digital signals between the transcoder and the codec to a data path from the IC to the external processor. The digital signals are formatted within the IC for processing by the external processor. The externally processed digital signals are returned to the IC via a data path from the external processor. The digital signals are then reformatted within the IC for further processing by the IC.
摘要翻译： 公开了一种用于选择性地实现集成电路（IC）外部的数字信号的中间数据处理的系统。 该系统包括代码转换器，连接到代码转换器的编解码器和位于IC外部的数据处理器。 响应于选通信号，可编程开关将代码转换器和编解码器之间的数字信号转换为从IC到外部处理器的数据路径。 数字信号在IC内格式化，由外部处理器进行处理。 经外部处理的数字信号通过外部处理器的数据路径返回到IC。 数字信号然后在IC内重新格式化，以便IC进一步处理。
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