公开(公告)号：US07979832B2

公开(公告)日：2011-07-12

申请号：US11873638

申请日：2007-10-17

申请人： Seong-Ook Jung ,  Sei Seung Yoon ,  Hyunwoo Nho

发明人： Seong-Ook Jung ,  Sei Seung Yoon ,  Hyunwoo Nho

IPC分类号： G06F17/50 ,  G06F9/455

CPC分类号： G06F17/5036 ,  G06F17/5045 ,  G06F2217/10

摘要： Methods and systems for designing process variation tolerant memory are disclosed. A memory circuit is divided into functional blocks. A statistical distribution is calculated for each of the functional blocks. Then, the distributions of each block are combined to verify a credibility of the circuit. The credibility is verified if the circuit meets a predetermined yield.

摘要翻译： 公开了用于设计过程变化容限存储器的方法和系统。 存储电路分为功能块。 计算每个功能块的统计分布。 然后，组合每个块的分布，以验证电路的可信度。 如果电路满足预定的收益率，则验证可信度。

公开(公告)号：US10319278B1

公开(公告)日：2019-06-11

申请号：US15251920

申请日：2016-08-30

申请人： Hyunwoo Nho ,  Mohammad B. Vahid Far ,  Xiaofeng Wang

发明人： Hyunwoo Nho ,  Mohammad B. Vahid Far ,  Xiaofeng Wang

IPC分类号： G09G3/20

摘要： Systems and methods are provided for generating a nonlinear clock signal. Such a signal may be used to drive sub-pixels of an electronic display. The electronic display may include a microdriver that drives at least one sub-pixel based at least in part on an image data signal and an emission clock signal. The image data signal specifies a gray level for driving the sub-pixel and the emission clock signal includes a series of pulses of monotonically increasing pulse widths to enable the microdriver to drive the sub-pixel to emit light for a particular amount of time associated with the gray level. An emission timing controller may generate the emission clock signal.

公开(公告)号：US20210150950A1

公开(公告)日：2021-05-20

申请号：US16644932

申请日：2018-08-31

申请人： Junhua TAN ,  Chin-Wei LIN ,  Hung Sheng LIN ,  Hyunsoo KIM ,  Hyunwoo NHO ,  Injae HWANG ,  Jesse A. RICHMOND ,  Jie Won RYU ,  Kavinaath MURUGAN ,  Kingsuk BRAHMA ,  Shengkui GAO ,  Shiping SHEN ,  Sun-Il CHANG ,  Myung-Je CHO ,  Yafei BI ,  Myungjoon CHOI ,  Chaohao WANG ,  Weichuan YAO ,  Apple Inc.

发明人： Chin-Wei Lin ,  Hung Sheng Lin ,  Hyunsoo Kim ,  Hyunwoo Nho ,  Injae Hwang ,  Jesse A. Richmond ,  Jie Won Ryu ,  Junhua Tan ,  Kavinaath Murugan ,  Kingsuk Brahma ,  Shengkui Gao ,  Shiping Shen ,  Sun-Il Chang ,  Myung-Je Cho ,  Yafei Bi

IPC分类号： G09G3/00

摘要： Electronic devices and methods for compensating for aging or other effects in a display during a non-transmitting state (off state) of the display. Sensing may include emissive element sensing of the display and/or thin film transistor sensing of the display. Compensating for the effects may preserve or increase a uniformity of transmission of the display.

公开(公告)号：US20120075938A1

公开(公告)日：2012-03-29

申请号：US12888575

申请日：2010-09-23

申请人： Pramod Kolar ,  Fatih Hamzaoglu ,  Yih Wang ,  Eric A. Karl ,  Yong-Gee NG ,  Uddalak Bhattacharya ,  Kevin X. Zhang ,  Hyunwoo Nho

发明人： Pramod Kolar ,  Fatih Hamzaoglu ,  Yih Wang ,  Eric A. Karl ,  Yong-Gee NG ,  Uddalak Bhattacharya ,  Kevin X. Zhang ,  Hyunwoo Nho

IPC分类号： G11C8/08 ,  G11C7/00

CPC分类号： G11C11/419 ,  G11C11/41 ,  G11C29/028

摘要： Adaptive and dynamic stability enhancement for memories is described. In one example, the enhancement includes a plurality of sensors each located near a plurality of memory cells to provide a sensor voltage, a controller to receive the sensor voltage and provide a control signal based thereon, and a read/write assist circuit coupled to the controller to adjust a parameter applied to reading from and writing to a memory cell of the plurality of memory cells in response to the control signal.

摘要翻译： 描述了存储器的自适应和动态稳定性增强。 在一个示例中，增强包括多个传感器，每个传感器各自位于多个存储器单元附近以提供传感器电压，控制器接收传感器电压并基于此提供控制信号;以及读/写辅助电路，耦合到 控制器，以响应于所述控制信号来调整应用于对所述多个存储器单元的存储单元的读取和写入的参数。

公开(公告)号：US20080141190A1

公开(公告)日：2008-06-12

申请号：US11873638

申请日：2007-10-17

申请人： Seong-Ook Jung ,  Sei Seung Yoon ,  Hyunwoo Nho

发明人： Seong-Ook Jung ,  Sei Seung Yoon ,  Hyunwoo Nho

IPC分类号： G06F17/50

CPC分类号： G06F17/5036 ,  G06F17/5045 ,  G06F2217/10

摘要： Methods and systems for designing process variation tolerant memory are disclosed. A memory circuit is divided into functional blocks. A statistical distribution is calculated for each of the functional blocks. Then, the distributions of each block are combined to verify a credibility of the circuit. The credibility is verified if the circuit meets a predetermined yield.

摘要翻译： 公开了用于设计过程变化容限存储器的方法和系统。 存储电路分为功能块。 计算每个功能块的统计分布。 然后，组合每个块的分布，以验证电路的可信度。 如果电路满足预定的收益率，则验证可信度。

公开(公告)号：US08451670B2

公开(公告)日：2013-05-28

申请号：US12888575

申请日：2010-09-23

申请人： Pramod Kolar ,  Fatih Hamzaoglu ,  Yih Wang ,  Eric A Karl ,  Yong-Gee Ng ,  Uddalak Bhattacharya ,  Kevin X. Zhang ,  Hyunwoo Nho

发明人： Pramod Kolar ,  Fatih Hamzaoglu ,  Yih Wang ,  Eric A Karl ,  Yong-Gee Ng ,  Uddalak Bhattacharya ,  Kevin X. Zhang ,  Hyunwoo Nho

IPC分类号： G11C7/00

CPC分类号： G11C11/419 ,  G11C11/41 ,  G11C29/028

摘要： Adaptive and dynamic stability enhancement for memories is described. In one example, the enhancement includes a plurality of sensors each located near a plurality of memory cells to provide a sensor voltage, a controller to receive the sensor voltage and provide a control signal based thereon, and a read/write assist circuit coupled to the controller to adjust a parameter applied to reading from and writing to a memory cell of the plurality of memory cells in response to the control signal.

摘要翻译： 描述了存储器的自适应和动态稳定性增强。 在一个示例中，增强包括多个传感器，每个传感器各自位于多个存储器单元附近以提供传感器电压，控制器接收传感器电压并基于此提供控制信号;以及读/写辅助电路，耦合到 控制器，用于响应于所述控制信号调整应用于对所述多个存储器单元的存储单元的读取和写入的参数。