Abstract:
A display device includes: a pixel area comprising pixels in rows and columns; main power lines at a first side of the pixel area and a second side of the pixel area facing the first side; first sub-power lines coupled to a first main power line of the main power lines formed at the first side and extending into the pixel area in a column direction; and second sub-power lines coupled to a second main power line of the main power lines formed at the second side and extending into the pixel area in the column direction, wherein the first sub-power lines and the second sub-power lines extend in different columns of pixels, and wherein a column of pixels of the pixels are alternatingly coupled to a neighboring sub-power line of the first sub-power lines and a neighboring sub-power line of the second sub-power lines.
Abstract:
Disclosed herein is a clamping structure for mounting a reducer. The clamping structure include a clamp body 431 that is formed at opposite sides thereof with a door connecting portion 431a and a latch member connecting portion 431b to form a rectangular shape with one open side, and a clamp door 434 that can be rotated about a hinge pin 433 formed at the door connecting portion 431a, wherein the clamp door 431 is formed at one side thereof with a fastening portion, to which a latch portion of a latch member 450 is latched to allow a lever handle 446 of a lever member 440 to be pushed, and wherein the lever member 440 is coupled at one end thereof to the latch member connecting portion 450 of the clamp body 431 by a hinge 444 and is rotatably coupled at a middle thereof to the latch member 450 by a hinge 454 of the latch member 450.
Abstract:
A sense amplifier circuit includes an enable signal generation unit configured to generate an enable signal when a change in a voltage level of input signals is sensed; a sink unit configured to provide a sense voltage in response to the enable signal; and a sense unit configured to generate an output signal in response to the sense voltage and the input signals.
Abstract:
An organic light emitting display having first pixel power source lines receiving a pixel driving voltage from first power supply sources and second pixel power source lines arranged between the first pixel power source lines and receiving a pixel driving voltage from second power supply sources, the light emitting diode of each of a plurality of pixels included in an image display unit is divided into two, and the divided light emitting diodes are coupled to the different pixel power source lines so that brightness non-uniformity of the image display unit caused by the IR drops of the pixel power source lines is reduced or prevented.
Abstract:
A semiconductor memory device includes a memory bank configured to output stored data in response to a column selection signal, a plurality of data latching units configured to latch the data outputted from the memory bank in response to an input control signal which is generated according to the column selection signal, and output the latched data in response to an output control signal, a time measurement unit configured to measure a time from an activation of the input control signal to an activation of the output control signal and generate a delay control signal, and an activation control unit configured to control an activation time of the column selection signal in response to the delay control signal.
Abstract:
A phase mixer includes a first driver configured to drive a first input signal to a mixing node with a driving force determined by a first setting value, a second driver configured to drive a second input signal to the mixing node with a driving force determined by a second setting value, and a slew rate control unit configured to control a slew rate at the mixing node.
Abstract:
The domain crossing circuit of a semiconductor memory apparatus for improving a timing margin includes a sampler that provides a sampling internal signal generated by delaying an internal input signal by a predetermined time in response to a clock and an edge information signal that defines an output timing of the sampling internal signal and an output stage that allows the sampling internal signal to be synchronized with the clock in response to the edge information signal to be output as a final output signal.
Abstract:
An organic light emitting display configured to be driven using a frame divided into a plurality of sub-frames includes a data driver configured to supply a plurality of data signals to output lines during a first period of one horizontal period of the sub-frame, a scan driver configured to sequentially supply a scan signal to scan lines during a second period of the one horizontal period of the sub-frame, a demultiplexer coupled to each output line, the demultiplexer being configured to supply the data signals to a plurality of data lines, buffers configured to supply buffers supplying signals from the demultiplexers to the data lines, the buffers including PMOS transistors, and pixels disposed at intersections of the scan lines and the data lines, the pixels being configured to display images corresponding to the data signals.
Abstract:
Disclosed herein is a CMP slurry composition. The CMP slurry composition includes cerium oxide particles, an adsorbent for adsorbing the cerium oxide particles to a polishing pad, an adsorption adjusting agent for adjusting adsorption performance of the adsorbent, and a pH adjusting agent. The CMP slurry composition may improve polishing efficiency of a patterned oxide layer and lifespan of a diamond disc conditioner.
Abstract:
Disclosed herein is a vacuum processing apparatus for performing a desired process for a substrate after establishing a vacuum atmosphere therein. More particularly, the vacuum processing apparatus includes a vacuum chamber, which is divided into a chamber body and an upper cover. The upper cover is configured to be easily opened away from and closed to the chamber body.