公开(公告)号：US20070187760A1

公开(公告)日：2007-08-16

申请号：US11701343

申请日：2007-02-01

Applicant: Mamoru Furuta ,  Takashi Hirao ,  Hiroshi Furuta ,  Tokiyoshi Matsuda ,  Takahiro Hiramatsu ,  Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida

Inventor： Mamoru Furuta ,  Takashi Hirao ,  Hiroshi Furuta ,  Tokiyoshi Matsuda ,  Takahiro Hiramatsu ,  Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida

IPC: H01L27/12 ,  H01L21/84

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618

Abstract: A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.

Abstract translation: 薄膜晶体管包括基板和形成在基板上并在其间形成间隙的一对源/漏电极（即源电极和漏电极）。 提供一对低电阻导电薄膜，使得每个涂覆源极/漏极之一的至少一部分。 低电阻导电薄膜在它们之间限定了间隙。 在一对低电阻导电薄膜的上表面上连续地形成氧化物半导体薄膜层，并且沿着限定在低电阻导电薄膜之间的间隙延伸以作为沟道起作用。 氧化物半导体薄膜层的侧表面和低电阻导电薄膜的相应侧表面在沟道的沟道宽度方向上彼此重合。

公开(公告)号：US07385224B2

公开(公告)日：2008-06-10

申请号：US11219171

申请日：2005-09-01

Applicant: Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida ,  Ikuhiro Yamaguchi

Inventor： Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida ,  Ikuhiro Yamaguchi

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618

Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).

Abstract translation: 本发明的薄膜晶体管包括半导体薄膜（8）; 形成在半导体薄膜（8）的一个表面上的栅极绝缘膜（7）; 通过栅极绝缘膜形成为与半导体薄膜（8）相对的栅电极（6）; 电连接到半导体薄膜（8）的源电极（15）和漏电极（16）。 源区; 漏区; 和通道区域。 薄膜晶体管还包括形成在至少对应于半导体薄膜（8）的源极区域和漏极区域的周边部分上的绝缘膜（9），并且具有接触孔（10,11） 源极区域和漏极区域中的至少一部分被暴露，其中源电极（15）和漏电极（16）通过接触孔（10,11）连接到半导体薄膜（8）。

公开(公告)号：US07981734B2

公开(公告)日：2011-07-19

申请号：US12499559

申请日：2009-07-08

Applicant: Mamoru Furuta ,  Takashi Hirao ,  Hiroshi Furuta ,  Tokiyoshi Matsuda ,  Takahiro Hiramatsu ,  Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida

Inventor： Mamoru Furuta ,  Takashi Hirao ,  Hiroshi Furuta ,  Tokiyoshi Matsuda ,  Takahiro Hiramatsu ,  Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida

IPC: H01L21/302

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618

Abstract: A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.

Abstract translation: 薄膜晶体管的制造方法包括在基板上形成一对源极/漏极，使得源极/漏极在其间限定间隙; 在源/漏电极上形成限定它们之间的间隙的低电阻导电薄膜; 以及在低电阻导电薄膜的上表面和限定在低电阻导电薄膜之间的间隙中形成氧化物半导体薄膜层，使得氧化物半导体薄膜层用作沟道。 蚀刻低电阻导电薄膜和氧化物半导体薄膜层，使得电阻导电薄膜的侧表面和氧化物半导体薄膜层的相应侧表面在沟道的沟道宽度方向上彼此重合。 栅电极安装在氧化物半导体薄膜层上。

公开(公告)号：US20090242887A1

公开(公告)日：2009-10-01

申请号：US12413318

申请日：2009-03-27

Applicant: Tetsuya YAMAMOTO ,  Naoki YAMAMOTO ,  Hisao MAKINO ,  Akira UJIHARA ,  Yoshinori HIRASHIMA ,  Hiroaki IWAOKA ,  Hisashi AOKI ,  Hitoshi HOKARI ,  Motohiko YOSHIDA

Inventor： Tetsuya YAMAMOTO ,  Naoki YAMAMOTO ,  Hisao MAKINO ,  Akira UJIHARA ,  Yoshinori HIRASHIMA ,  Hiroaki IWAOKA ,  Hisashi AOKI ,  Hitoshi HOKARI ,  Motohiko YOSHIDA

IPC: H01L33/00 ,  H01L21/28 ,  C23C14/32

CPC classification number: G02F1/13439 ,  C23C14/086 ,  C23C14/34 ,  C23C14/3485 ,  H01L51/5215

Abstract: A display substrate is disclosed comprising: a supporting substrate; an organic resin layer formed on the supporting substrate; and a transparent electrode formed on the organic resin layer, wherein the transparent electrode includes: a first layer containing a zinc oxide and formed in close contact with the organic resin layer; and a second layer containing a zinc oxide and which has a thickness thicker than a thickness of the first layer and is formed on the first layer, wherein the first layer is deposited by either one of a DC sputtering and a DC magnetron sputtering, and the second layer is deposited by any one of a radio frequency sputtering, a radio frequency magnetron sputtering, a radio frequency superimposing a DC sputtering, and a radio frequency superimposing a DC magnetron sputtering, and the display substrate is available, for example, as the substrate having a transparent electrode for counter electrode of liquid crystal display device.

Abstract translation: 公开了一种显示基板，包括：支撑基板; 形成在所述支撑基板上的有机树脂层; 和形成在有机树脂层上的透明电极，其中透明电极包括：含有氧化锌并与有机树脂层紧密接触形成的第一层; 和含有氧化锌的第二层，其厚度比第一层的厚度厚，并且形成在第一层上，其中第一层通过DC溅射和DC磁控溅射中的任一种沉积，并且 第二层通过射频溅射，射频磁控溅射，射频叠加DC溅射和叠加DC磁控溅射的射频中的任一种沉积，并且显示基板可用作例如基板 具有用于液晶显示装置的对电极的透明电极。

公开(公告)号：US20090269881A1

公开(公告)日：2009-10-29

申请号：US12499559

申请日：2009-07-08

Applicant: Mamoru FURUTA ,  Takashi Hirao ,  Hiroshi Furuta ,  Tokiyoshi Matsuda ,  Takahiro Hiramatsu ,  Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida

Inventor： Mamoru FURUTA ,  Takashi Hirao ,  Hiroshi Furuta ,  Tokiyoshi Matsuda ,  Takahiro Hiramatsu ,  Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida

IPC: H01L21/336

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618

Abstract: A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.

Abstract translation: 薄膜晶体管的制造方法包括在基板上形成一对源极/漏极，使得源极/漏极在其间限定间隙; 在源/漏电极上形成限定它们之间的间隙的低电阻导电薄膜; 以及在低电阻导电薄膜的上表面和限定在低电阻导电薄膜之间的间隙中形成氧化物半导体薄膜层，使得氧化物半导体薄膜层用作沟道。 蚀刻低电阻导电薄膜和氧化物半导体薄膜层，使得电阻导电薄膜的侧表面和氧化物半导体薄膜层的相应侧表面在沟道的沟道宽度方向上彼此重合。 栅电极安装在氧化物半导体薄膜层上。

公开(公告)号：US07576394B2

公开(公告)日：2009-08-18

申请号：US11701343

申请日：2007-02-01

Applicant: Mamoru Furuta ,  Takashi Hirao ,  Hiroshi Furuta ,  Tokiyoshi Matsuda ,  Takahiro Hiramatsu ,  Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida

Inventor： Mamoru Furuta ,  Takashi Hirao ,  Hiroshi Furuta ,  Tokiyoshi Matsuda ,  Takahiro Hiramatsu ,  Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida

IPC: H01L31/0392

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618

Abstract: A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.

Abstract translation: 薄膜晶体管包括基板和形成在基板上并在其间形成间隙的一对源/漏电极（即源电极和漏电极）。 提供一对低电阻导电薄膜，使得每个涂覆源极/漏极之一的至少一部分。 低电阻导电薄膜在它们之间限定了间隙。 在一对低电阻导电薄膜的上表面上连续地形成氧化物半导体薄膜层，并且沿着限定在低电阻导电薄膜之间的间隙延伸以作为沟道起作用。 氧化物半导体薄膜层的侧表面和低电阻导电薄膜的相应侧表面在沟道的沟道宽度方向上彼此重合。

公开(公告)号：US20060043447A1

公开(公告)日：2006-03-02

申请号：US11219171

申请日：2005-09-01

Applicant: Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida ,  Ikuhiro Yamaguchi

Inventor： Hiromitsu Ishii ,  Hitoshi Hokari ,  Motohiko Yoshida ,  Ikuhiro Yamaguchi

IPC: H01L29/94

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618

Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).

Abstract translation: 本发明的薄膜晶体管包括半导体薄膜（8）; 形成在半导体薄膜（8）的一个表面上的栅极绝缘膜（7）; 通过栅极绝缘膜形成为与半导体薄膜（8）相对的栅电极（6）; 电连接到半导体薄膜（8）的源电极（15）和漏电极（16）。 源区; 漏区; 和通道区域。 薄膜晶体管还包括形成在至少对应于半导体薄膜（8）的源极区域和漏极区域的周边部分上的绝缘膜（9），并且具有接触孔（10,11） 源极区域和漏极区域中的至少一部分被暴露，其中源电极（15）和漏电极（16）通过接触孔（10,11）连接到半导体薄膜（8）。